diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2014-01-27 11:26:33 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2014-01-29 15:23:05 -0500 |
| commit | 50efa51afddb50a6ab47ee15614fcf180130888c (patch) | |
| tree | 5f80ce2157217fe83c3569a484e03c2e15f5e4d7 /drivers/gpu/drm/radeon/rv770.c | |
| parent | b9ace36f13c6fc46391c9d40edc648eef3a59ab0 (diff) | |
drm/radeon: clean up active vram sizing
If we are not able to properly initialize one of the gpu
engines for buffer paging, we limit vram to the size of
the cpu visible aperture. We generally either use the gfx
or dma engine to do this. Clean up the size limiting code
to only adjust the size based on what ring is selected
for buffer paging rather than making assumptions about which
engine is selected for paging.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/rv770.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/rv770.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index 18e02889ec7d..6c772e58c784 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c @@ -1071,7 +1071,8 @@ static void rv770_mc_program(struct radeon_device *rdev) */ void r700_cp_stop(struct radeon_device *rdev) { - radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); + if (rdev->asic->copy.copy_ring_index == RADEON_RING_TYPE_GFX_INDEX) + radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT)); WREG32(SCRATCH_UMSK, 0); rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = false; |