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author | Thomas Gleixner <tglx@linutronix.de> | 2020-06-11 15:17:57 +0200 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2020-06-11 15:17:57 +0200 |
commit | f77d26a9fc525286bcef3d4f98b52e17482cf49c (patch) | |
tree | 6b179c9aa84787773cb601a14a64255e2912154b /arch/sh/kernel/cpu/init.c | |
parent | b6bea24d41519e8c31e4798f1c1a3f67e540c5d0 (diff) | |
parent | f0178fc01fe46bab6a95415f5647d1a74efcad1b (diff) |
Merge branch 'x86/entry' into ras/core
to fixup conflicts in arch/x86/kernel/cpu/mce/core.c so MCE specific follow
up patches can be applied without creating a horrible merge conflict
afterwards.
Diffstat (limited to 'arch/sh/kernel/cpu/init.c')
-rw-r--r-- | arch/sh/kernel/cpu/init.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c index ce7291e12a30..1d008745877f 100644 --- a/arch/sh/kernel/cpu/init.c +++ b/arch/sh/kernel/cpu/init.c @@ -103,7 +103,7 @@ void __attribute__ ((weak)) l2_cache_init(void) /* * Generic first-level cache init */ -#if defined(CONFIG_SUPERH32) && !defined(CONFIG_CPU_J2) +#if !defined(CONFIG_CPU_J2) static void cache_init(void) { unsigned long ccr, flags; |