diff options
| author | Bjorn Helgaas <bhelgaas@google.com> | 2020-10-21 09:58:34 -0500 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2020-10-21 09:58:34 -0500 |
| commit | 97d0260bf3883ea0c8b24a1293265fd3d947554c (patch) | |
| tree | 8d7a2c6761c426cab67e039d0cec47d0341083bc | |
| parent | 9123e3a74ec7b934a4a099e98af6a61c2f80bbf5 (diff) | |
| parent | 76fc8e854e3b0b4641acf596d4a59f36d9939083 (diff) | |
Merge branch 'pci/acs'
- Enable Translation Blocking for external devices (Rajat Jain)
* pci/acs:
PCI/ACS: Enable Translation Blocking for external devices
| -rw-r--r-- | drivers/pci/pci.c | 4 | ||||
| -rw-r--r-- | drivers/pci/quirks.c | 10 |
2 files changed, 14 insertions, 0 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index a458c46d7e39..8b649b01aad3 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -876,6 +876,10 @@ static void pci_std_enable_acs(struct pci_dev *dev) /* Upstream Forwarding */ ctrl |= (cap & PCI_ACS_UF); + /* Enable Translation Blocking for external devices */ + if (dev->external_facing || dev->untrusted) + ctrl |= (cap & PCI_ACS_TB); + pci_write_config_word(dev, pos + PCI_ACS_CTRL, ctrl); } diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index bdf9b52567e0..8f409d442bc0 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -4949,6 +4949,13 @@ static void pci_quirk_enable_intel_rp_mpc_acs(struct pci_dev *dev) } } +/* + * Currently this quirk does the equivalent of + * PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF + * + * TODO: This quirk also needs to do equivalent of PCI_ACS_TB, + * if dev->external_facing || dev->untrusted + */ static int pci_quirk_enable_intel_pch_acs(struct pci_dev *dev) { if (!pci_quirk_intel_pch_acs_match(dev)) @@ -4988,6 +4995,9 @@ static int pci_quirk_enable_intel_spt_pch_acs(struct pci_dev *dev) ctrl |= (cap & PCI_ACS_CR); ctrl |= (cap & PCI_ACS_UF); + if (dev->external_facing || dev->untrusted) + ctrl |= (cap & PCI_ACS_TB); + pci_write_config_dword(dev, pos + INTEL_SPT_ACS_CTRL, ctrl); pci_info(dev, "Intel SPT PCH root port ACS workaround enabled\n"); |