diff options
| author | Christoph Hellwig <hch@lst.de> | 2019-06-03 12:54:13 +0200 |
|---|---|---|
| committer | Christoph Hellwig <hch@lst.de> | 2019-06-25 08:14:39 +0200 |
| commit | 961729bfc73e698be19305834805592227bd09e3 (patch) | |
| tree | 21d68caded55e364bcea7e17bf349ec2566320f9 | |
| parent | 80e61fcd23946cb222f780a49ab2eeb7ef1d3749 (diff) | |
openrisc: remove the partial DMA_ATTR_NON_CONSISTENT support
The openrisc DMA code supports DMA_ATTR_NON_CONSISTENT allocations, but
does not provide a cache_sync operation. This means any user of it
will never be able to actually transfer cache ownership and thus cause
coherency bugs.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Stafford Horne <shorne@gmail.com>
| -rw-r--r-- | arch/openrisc/kernel/dma.c | 22 |
1 files changed, 9 insertions, 13 deletions
diff --git a/arch/openrisc/kernel/dma.c b/arch/openrisc/kernel/dma.c index f79457cb3741..9f25fd0fbb5d 100644 --- a/arch/openrisc/kernel/dma.c +++ b/arch/openrisc/kernel/dma.c @@ -98,15 +98,13 @@ arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle, va = (unsigned long)page; - if ((attrs & DMA_ATTR_NON_CONSISTENT) == 0) { - /* - * We need to iterate through the pages, clearing the dcache for - * them and setting the cache-inhibit bit. - */ - if (walk_page_range(va, va + size, &walk)) { - free_pages_exact(page, size); - return NULL; - } + /* + * We need to iterate through the pages, clearing the dcache for + * them and setting the cache-inhibit bit. + */ + if (walk_page_range(va, va + size, &walk)) { + free_pages_exact(page, size); + return NULL; } return (void *)va; @@ -122,10 +120,8 @@ arch_dma_free(struct device *dev, size_t size, void *vaddr, .mm = &init_mm }; - if ((attrs & DMA_ATTR_NON_CONSISTENT) == 0) { - /* walk_page_range shouldn't be able to fail here */ - WARN_ON(walk_page_range(va, va + size, &walk)); - } + /* walk_page_range shouldn't be able to fail here */ + WARN_ON(walk_page_range(va, va + size, &walk)); free_pages_exact(vaddr, size); } |