diff options
author | Zhangfei Gao <zhangfei.gao@linaro.org> | 2013-08-20 10:21:01 +0800 |
---|---|---|
committer | Guodong Xu <guodong.xu@linaro.org> | 2013-08-23 18:35:51 +0800 |
commit | 0ed290fd9ea34e49db1b43ed2188d0dc69570462 (patch) | |
tree | fff6f9854ed0580f55bea551c75332ad0d183853 | |
parent | f34c424819158022e9eac26094d07a7309038e3a (diff) |
ARM: hs: dts: add i2c & touch
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
-rw-r--r-- | arch/arm/boot/dts/hi3620.dtsi | 36 | ||||
-rw-r--r-- | arch/arm/boot/dts/hi4511.dts | 56 |
2 files changed, 92 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/hi3620.dtsi b/arch/arm/boot/dts/hi3620.dtsi index 3cf778fbb063..d0baa681e561 100644 --- a/arch/arm/boot/dts/hi3620.dtsi +++ b/arch/arm/boot/dts/hi3620.dtsi @@ -1489,6 +1489,42 @@ pinctrl-single,register-width = <32>; }; + i2c0: i2c@fcb08000 { + compatible = "snps,designware-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xfcb08000 0x1000>; + interrupts = <0 28 4>; + clocks = <&i2cclk0>; + status = "disabled"; + }; + + i2c1: i2c@fcb09000 { + compatible = "snps,designware-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xfcb09000 0x1000>; + interrupts = <0 29 4>; + clocks = <&i2cclk1>; + status = "disabled"; + }; + + i2c2: i2c@fcb0c000 { + compatible = "snps,designware-i2c"; + reg = <0xfcb0c000 0x1000>; + interrupts = <0 62 4>; + clocks = <&i2cclk2>; + status = "disabled"; + }; + + i2c3: i2c@fcb0d000 { + compatible = "snps,designware-i2c"; + reg = <0xfcb0d000 0x1000>; + interrupts = <0 63 4>; + clocks = <&i2cclk3>; + status = "disabled"; + }; + /* unremovable emmc as mmcblk0 */ dwmmc_1: dwmmc1@fcd04000 { compatible = "hisilicon,hi4511-dw-mshc"; diff --git a/arch/arm/boot/dts/hi4511.dts b/arch/arm/boot/dts/hi4511.dts index 31634eb0b682..b8d27401c4a9 100644 --- a/arch/arm/boot/dts/hi4511.dts +++ b/arch/arm/boot/dts/hi4511.dts @@ -828,6 +828,62 @@ >; }; }; + + i2c0: i2c@fcb08000 { + status = "ok"; + pinctrl-names = "default", "idle"; + pinctrl-0 = <&i2c0_pmx_func &i2c0_cfg_func>; + pinctrl-1 = <&i2c0_pmx_idle &i2c0_cfg_func>; + }; + + i2c1: i2c@fcb09000 { + status = "ok"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pmx_func &i2c1_cfg_func>; + ts_mxt224e: ts@4a { + compatible = "atmel,ts-mxt224e"; + reg = <0x4a>; + ldo-supply = <&ldo6>; + pinctrl-names = "default"; + pinctrl-0 = <&ts_pin_cfg>; + atmel-ts,gpio-irq = <&gpio19 5 0>; + atmel-ts,gpio-reset = <&gpio19 4 0>; + /* min max: x y pressure width */ + atmel-ts,abs = <0 719 0 1279 0 255 0 255>; + atmel-ts,cfg_t6 = /bits/ 8 <0 0 0 0 0 0>; + atmel-ts,cfg_t7 = /bits/ 8 <32 255 10>; + atmel-ts,cfg_t8 = /bits/ 8 <24 0 1 10 0 0 5 60 10 192>; + atmel-ts,cfg_t9 = /bits/ 8 <143 0 0 19 11 0 32 66 2 3 0 2 2 47 10 15 22 10 106 5 + 207 2 0 0 0 0 161 40 183 64 30 20 0 0 1>; + atmel-ts,cfg_t15 = /bits/ 8 <0 0 0 0 0 0 0 0 0 0 0>; + atmel-ts,cfg_t19 = /bits/ 8 <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>; + atmel-ts,cfg_t23 = /bits/ 8 <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>; + atmel-ts,cfg_t25 = /bits/ 8 <0 0 0 0 0 0 0 0 0 0 0 0 0 0>; + atmel-ts,cfg_t40 = /bits/ 8 <0 0 0 0 0>; + atmel-ts,cfg_t42 = /bits/ 8 <0 40 40 80 128 0 0 0>; + atmel-ts,cfg_t46 = /bits/ 8 <0 3 32 32 0 0 0 0 0>; + atmel-ts,cfg_t47 = /bits/ 8 <0 20 50 5 2 40 40 180 0 100>; + atmel-ts,cfg_t48 = /bits/ 8 <1 4 10 0 0 0 0 0 1 1 0 0 0 6 6 0 0 63 6 64 + 10 0 20 5 0 38 0 20 0 0 0 0 0 0 0 40 2 2 2 32 + 10 12 20 241 251 0 0 191 40 183 64 30 15 0>; + atmel-ts,object_crc = /bits/ 8 <0xFD 0x3B 0x8D>; + atmel-ts,cable_config = /bits/ 8 <70 30 32 32>; + atmel-ts,cable_config_t7 = /bits/ 8 <32 16 25>; + atmel-ts,cable_config_t8 = /bits/ 8 <24 0 5 5 0 0 5 60 10 192>; + atmel-ts,cable_config_T9 = /bits/ 8 <139 0 0 19 11 0 32 66 2 3 0 5 2 64 10 + 12 20 10 106 5 207 2 0 0 0 0 161 40 183 64 30 20 0 0 0>; + atmel-ts,cable_config_t46 = /bits/ 8 <0 3 40 40 0 0 0 0 0>; + atmel-ts,cable_config_t48 = /bits/ 8 <1 128 114 0 0 0 0 0 1 2 0 0 0 6 6 + 0 0 63 6 64 10 0 20 5 0 38 0 20 0 0 0 0 0 0 0 + 40 2 2 2 32 10 12 20 241 251 0 0 191 40 183 64 30 15 0>; + atmel-ts,noise_config = /bits/ 8 <70 3 35>; + atmel-ts,filter_level = /bits/ 16 <0 0 539 539>; + atmel-ts,gcaf_level = /bits/ 8 <8 16 24 32 40>; + atmel-ts,atch_nor = /bits/ 8 <0 0 5 60 10 192>; + atmel-ts,atch_nor_20s = /bits/ 8 <0 0 255 1 0 0>; + }; + }; + dwmmc1@fcd04000 { num-slots = <1>; vmmc-supply = <&ldo0>; |