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authorZhangfei Gao <zhangfei.gao@linaro.org>2014-04-11 20:46:52 +0800
committerZhangfei Gao <zhangfei.gao@linaro.org>2014-04-11 20:46:52 +0800
commit24c94c0097409d19e960ec115f4a88bab3eee012 (patch)
tree5abe87d19194ee05ebf3ecf0c34cd15de138305e
parentd35182b76de9fa652079653be0b715615e381501 (diff)
ARM: dts: hip04: enable only 1 coreprev-integration-hilt-linux-linaro-v3.14-rc4
workaround Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
-rw-r--r--arch/arm/boot/dts/hip04.dtsi35
1 files changed, 2 insertions, 33 deletions
diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot/dts/hip04.dtsi
index df10aad19f82..5b7e319fd659 100644
--- a/arch/arm/boot/dts/hip04.dtsi
+++ b/arch/arm/boot/dts/hip04.dtsi
@@ -26,42 +26,11 @@
#address-cells = <1>;
#size-cells = <0>;
- cpu-map {
- cluster0 {
- core0 {
- cpu = <&CPU0>;
- };
- core1 {
- cpu = <&CPU1>;
- };
- core2 {
- cpu = <&CPU2>;
- };
- core3 {
- cpu = <&CPU3>;
- };
- };
- };
- CPU0: cpu@0 {
+ cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0>;
};
- CPU1: cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a15";
- reg = <1>;
- };
- CPU2: cpu@2 {
- device_type = "cpu";
- compatible = "arm,cortex-a15";
- reg = <2>;
- };
- CPU3: cpu@3 {
- device_type = "cpu";
- compatible = "arm,cortex-a15";
- reg = <3>;
- };
};
soc {
@@ -74,7 +43,7 @@
ranges = <0 0 0xe0000000 0x10000000>;
gic: interrupt-controller@c01000 {
- compatible = "hisilicon,hip04-gic";
+ compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;