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authorAbdellatif El Khlifi <abdellatif.elkhlifi@arm.com>2020-11-24 16:44:41 +0000
committerAbdellatif El Khlifi <abdellatif.elkhlifi@arm.com>2020-11-27 10:58:26 +0000
commitde5545a5629e644372f5fde6037314dc3fc98a85 (patch)
treeda796005d20b3400cf791987c625c3d010a8f0c3 /docs/corstone500/change-log.rst
parenta21b2bccf8e570863392dd82a0622abd50e532ad (diff)
Corstone-500: adding Corstone-500 documentationCORSTONE-500-2020.11.27
This commit provides Corstone-500 documentation. Change-Id: Iea33a329b9428a14ab6ce89ecbd848b7dfd54eb3 Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
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+Change Log
+==========
+
+This document contains a summary of the new features, changes and
+fixes in each release of Corstone-500.
+
+Version 2020.11.27
+------------------
+
+Features added
+~~~~~~~~~~~~~~
+
+None.
+
+Changes
+~~~~~~~
+- Branding CA5DS to Corstone-500.
+- Upgrading the kernel to v5.3.
+- Using Yocto meta-arm layers aligned with Yocto Gatesgarth.
+- Upgrading Trusted firmware A to v2.3 with a fix for the system timer issue.
+- Upgrading u-boot to 2020.07 with a fix for the generic timer MMIO access issue.
+
+Version 2020.03.06
+------------------
+
+Features added
+~~~~~~~~~~~~~~
+- Support for Snoop Control Unit and its device driver.
+- Support for Cortex-A5 DesignStart on MPS3 FPGA.
+
+Changes
+~~~~~~~
+- Changes to make the same software work on FPGA and FVP.
+- Changes to Linux kernel config to run from DRAM (DDR).
+
+Version 2019.09.16
+------------------
+
+Features added
+~~~~~~~~~~~~~~
+- Platform port of Cortex-A5 DesignStart including GICv1 changes.
+- Support for Arm v7 architecture in Trusted firmware A.
+- Support for non-LPAE mapping in Trusted firmware A.
+- Division functionality for cores that don't have divide hardware.
+- Support for mmio based generic timer in u-boot.
+
+--------------
+
+*Copyright (c) 2019-2020, Arm Limited. All rights reserved.*