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path: root/arch/x86/kernel/cpu/common.c
AgeCommit message (Expand)Author
2018-12-05x86/bugs: Add AMD's SPEC_CTRL MSR usageKonrad Rzeszutek Wilk
2018-12-05x86/bugs: Add AMD's variant of SSB_NOKonrad Rzeszutek Wilk
2018-11-13x86/speculation: Support Enhanced IBRS on future CPUsSai Praneeth
2018-09-05x86/speculation/l1tf: Increase l1tf memory limit for Nehalem+Andi Kleen
2018-08-15x86/CPU/AMD: Have smp_num_siblings and cpu_llc_id always be presentBorislav Petkov
2018-08-15x86/cpu/common: Provide detect_ht_early()Thomas Gleixner
2018-08-15x86/cpu: Remove the pointless CPU printoutThomas Gleixner
2018-08-15x86/speculation/l1tf: Add sysfs reporting for l1tfAndi Kleen
2018-05-22x86/bugs: Rename SSBD_NO to SSB_NOKonrad Rzeszutek Wilk
2018-05-22KVM: SVM: Implement VIRT_SPEC_CTRL support for SSBDTom Lendacky
2018-05-22x86/cpufeatures: Disentangle SSBD enumerationThomas Gleixner
2018-05-22x86/cpufeatures: Disentangle MSR_SPEC_CTRL enumeration from IBRSThomas Gleixner
2018-05-22x86/speculation: Use synthetic bits for IBRS/IBPB/STIBPBorislav Petkov
2018-05-22x86/bugs: Rename _RDS to _SSBDKonrad Rzeszutek Wilk
2018-05-22x86/bugs/AMD: Add support to disable RDS on Fam[15,16,17]h if requestedKonrad Rzeszutek Wilk
2018-05-22x86/bugs/intel: Set proper CPU features and setup RDSKonrad Rzeszutek Wilk
2018-05-22x86/bugs: Expose /sys/../spec_store_bypassKonrad Rzeszutek Wilk
2018-05-22x86/bugs: Concentrate bug detection into a separate functionKonrad Rzeszutek Wilk
2018-04-12x86/CPU: Check CPU feature bits after microcode upgradeBorislav Petkov
2018-04-12x86/CPU: Add a microcode loader callbackBorislav Petkov
2018-02-22x86/cpu: Change type of x86_cache_size variable to unsigned intGustavo A. R. Silva
2018-02-22x86/cpu: Rename cpu_data.x86_mask to cpu_data.x86_steppingJia Zhang
2018-02-07x86/pti: Mark constant arrays as __initconstArnd Bergmann
2018-02-07x86/cpuid: Fix up "virtual" IBRS/IBPB/STIBP feature bits on IntelDavid Woodhouse
2018-02-07x86/pti: Do not enable PTI on CPUs which are not vulnerable to MeltdownDavid Woodhouse
2018-02-07x86/cpufeatures: Add CPUID_7_EDX CPUID leafDavid Woodhouse
2018-01-17x86/spectre: Add boot time option to select Spectre v2 mitigationDavid Woodhouse
2018-01-17x86/retpoline: Add initial retpoline supportDavid Woodhouse
2018-01-17x86/cpufeatures: Add X86_BUG_SPECTRE_V[12]David Woodhouse
2018-01-10x86/pti: Rename BUG_CPU_INSECURE to BUG_CPU_MELTDOWNThomas Gleixner
2018-01-05x86/cpu, x86/pti: Do not enable PTI on AMD processorsTom Lendacky
2018-01-02x86/mm/pti: Force entry through trampoline when PTI activeThomas Gleixner
2018-01-02x86/cpufeatures: Add X86_BUG_CPU_INSECUREThomas Gleixner
2017-12-29x86/cpu_entry_area: Move it to a separate unitThomas Gleixner
2017-12-29x86/entry: Rename SYSENTER_stack to CPU_ENTRY_AREA_entry_stackDave Hansen
2017-12-25x86/cpufeatures: Make CPU bugs stickyThomas Gleixner
2017-12-25x86/entry/64: Make cpu_entry_area.tss read-onlyAndy Lutomirski
2017-12-25x86/entry: Clean up the SYSENTER_stack codeAndy Lutomirski
2017-12-25x86/entry/64: Move the IST stacks into struct cpu_entry_areaAndy Lutomirski
2017-12-25x86/entry/64: Create a per-CPU SYSCALL entry trampolineAndy Lutomirski
2017-12-25x86/entry/64: Use a per-CPU trampoline stack for IDT entriesAndy Lutomirski
2017-12-25x86/entry: Remap the TSS into the CPU entry areaAndy Lutomirski
2017-12-25x86/entry: Move SYSENTER_stack to the beginning of struct tss_structAndy Lutomirski
2017-12-25x86/entry: Fix assumptions that the HW TSS is at the beginning of cpu_tssAndy Lutomirski
2017-12-25x86/mm/fixmap: Generalize the GDT fixmap mechanism, introduce struct cpu_entr...Andy Lutomirski
2017-12-25x86/entry/64: Allocate and enable the SYSENTER stackAndy Lutomirski
2017-12-25x86/entry/64: Stop initializing TSS.sp0 at bootAndy Lutomirski
2017-12-25x86/entry/64: Pass SP0 directly to load_sp0()Andy Lutomirski
2017-12-25x86/fpu: Parse clearcpuid= as early XSAVE argumentAndi Kleen
2017-09-17x86/mm/32: Move setup_clear_cpu_cap(X86_FEATURE_PCID) earlierAndy Lutomirski
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