diff options
| author | Joseph Lo <josephl@nvidia.com> | 2013-06-03 16:10:04 +0800 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2013-06-05 11:37:08 -0600 |
| commit | af7f322ea8d00d120f06de4d6f73ad704c7fcc61 (patch) | |
| tree | a1633d9fb35c80d749a22f87780015d4d51bb476 /arch/arm/mach-tegra | |
| parent | 510bb595de26f90e5bb7c4a1e2a584e38398cf00 (diff) | |
ARM: tegra: remove ifdef in the tegra_resume
The ifdef was originally added with the intent that the runtime SoC
detection code, and code to support SoCs other than Tegra20, was only
included if the kernel supported SoCs other than Tegra20. However,
the condition was somewhat backwards and did not achieve this goal.
Simply remove the ifdef to solve this, rather than creating a much more
complex version.
We also fix a typo that caused a build error due to cpu_to_csr_req being
undefined.
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
[swarren: rewrote commit description]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra')
| -rw-r--r-- | arch/arm/mach-tegra/reset-handler.S | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S index d2042ac736eb..39dc9e7834f3 100644 --- a/arch/arm/mach-tegra/reset-handler.S +++ b/arch/arm/mach-tegra/reset-handler.S @@ -54,12 +54,11 @@ ENTRY(tegra_resume) bne cpu_resume @ no no_cpu0_chk: -#ifndef CONFIG_ARCH_TEGRA_2x_SOC /* Are we on Tegra20? */ cmp r6, #TEGRA20 beq 1f @ Yes /* Clear the flow controller flags for this CPU. */ - cpu_to_csr_req r1, r0 + cpu_to_csr_reg r1, r0 mov32 r2, TEGRA_FLOW_CTRL_BASE ldr r1, [r2, r1] /* Clear event & intr flag */ @@ -70,7 +69,6 @@ no_cpu0_chk: bic r1, r1, r0 str r1, [r2] 1: -#endif check_cpu_part_num 0xc09, r8, r9 bne not_ca9 |