aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorMax Filippov <jcmvbkbc@gmail.com>2015-09-22 14:32:03 +0300
committerSasha Levin <sasha.levin@oracle.com>2015-10-27 22:13:17 -0400
commit3cd1f376b0a0ec0c5f044d740705d89c740e8490 (patch)
treed5571385a509359159da4a66b0e9f96cf43f8230
parent9ab878154d89756408338aff0b2afeaaf84fc925 (diff)
spi: xtensa-xtfpga: fix register endianness
[ Upstream commit b0b4855099e301c8603ea37da9a0103a96c2e0b1 ] XTFPGA SPI controller has native endian registers. Fix register acessors so that they work in big-endian configurations. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org Signed-off-by: Sasha Levin <sasha.levin@oracle.com>
-rw-r--r--drivers/spi/spi-xtensa-xtfpga.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/spi/spi-xtensa-xtfpga.c b/drivers/spi/spi-xtensa-xtfpga.c
index 0dc5df5233a9..cb030389a265 100644
--- a/drivers/spi/spi-xtensa-xtfpga.c
+++ b/drivers/spi/spi-xtensa-xtfpga.c
@@ -34,13 +34,13 @@ struct xtfpga_spi {
static inline void xtfpga_spi_write32(const struct xtfpga_spi *spi,
unsigned addr, u32 val)
{
- iowrite32(val, spi->regs + addr);
+ __raw_writel(val, spi->regs + addr);
}
static inline unsigned int xtfpga_spi_read32(const struct xtfpga_spi *spi,
unsigned addr)
{
- return ioread32(spi->regs + addr);
+ return __raw_readl(spi->regs + addr);
}
static inline void xtfpga_spi_wait_busy(struct xtfpga_spi *xspi)