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git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into fixes
ARM: tegra: fixes for 3.8
This branch contains a few miscellaneous fixes that have shown up in the
last few weeks.
By Sivaram Nair (2) and Hiroshi Doyu (1)
via Stephen Warren
* tag 'tegra-for-3.8-fixes-for-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
amba: tegra-ahb: Fix warning w/o PM_SLEEP
ARM: tegra: fix comment in dsib clk set_parent
ARM: tegra: select correct parent clk for pll_p
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial
Pull trivial branch from Jiri Kosina:
"Usual stuff -- comment/printk typo fixes, documentation updates, dead
code elimination."
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (39 commits)
HOWTO: fix double words typo
x86 mtrr: fix comment typo in mtrr_bp_init
propagate name change to comments in kernel source
doc: Update the name of profiling based on sysfs
treewide: Fix typos in various drivers
treewide: Fix typos in various Kconfig
wireless: mwifiex: Fix typo in wireless/mwifiex driver
messages: i2o: Fix typo in messages/i2o
scripts/kernel-doc: check that non-void fcts describe their return value
Kernel-doc: Convention: Use a "Return" section to describe return values
radeon: Fix typo and copy/paste error in comments
doc: Remove unnecessary declarations from Documentation/accounting/getdelays.c
various: Fix spelling of "asynchronous" in comments.
Fix misspellings of "whether" in comments.
eisa: Fix spelling of "asynchronous".
various: Fix spelling of "registered" in comments.
doc: fix quite a few typos within Documentation
target: iscsi: fix comment typos in target/iscsi drivers
treewide: fix typo of "suport" in various comments and Kconfig
treewide: fix typo of "suppport" in various comments
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC multiplatform conversion patches from Olof Johansson:
"Here are more patches in the progression towards multiplatform, sparse
irq conversions in particular.
Tegra has a handful of cleanups and general groundwork, but is not
quite there yet on full enablement.
Platforms that are enabled through this branch are VT8500 and Zynq.
Note that i.MX was converted in one of the earlier cleanup branches as
well (before we started a separate topic for multiplatform). And both
new platforms for this merge window, sunxi and bcm, were merged with
multiplatform support enabled."
Fix up conflicts mostly as per Olof.
* tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (29 commits)
ARM: zynq: Remove all unused mach headers
ARM: zynq: add support for ARCH_MULTIPLATFORM
ARM: zynq: make use of debug_ll_io_init()
ARM: zynq: remove TTC early mapping
ARM: tegra: move debug-macro.S to include/debug
ARM: tegra: don't include iomap.h from debug-macro.S
ARM: tegra: decouple uncompress.h and debug-macro.S
ARM: tegra: simplify DEBUG_LL UART selection options
ARM: tegra: select SPARSE_IRQ
ARM: tegra: enhance timer.c to get IO address from device tree
ARM: tegra: enhance timer.c to get IRQ info from device tree
ARM: timer: fix checkpatch warnings
ARM: tegra: add TWD to device tree
ARM: tegra: define DT bindings for and instantiate RTC
ARM: tegra: define DT bindings for and instantiate timer
clocksource/mtu-nomadik: use apb_pclk
clk: ux500: Register mtu apb_pclocks
ARM: plat-nomadik: convert platforms to SPARSE_IRQ
mfd/db8500-prcmu: use the irq_domain_add_simple()
mfd/ab8500-core: use irq_domain_add_simple()
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Correct spelling typo within various Kconfig.
Signed-off-by: Masanari Iida <standby24x7@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
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Since the clk framework has already taken necessary locks before calling
into the arch clk ops code, no further locks are needed while setting
the parent of dsib clk. This patch removes a comment that indicated
otherwise, and yet did not take any locks.
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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For Tegra30, pll_p clk's parent is wrongly specified as clk_m instead of
pll_ref in the tegra30_clk_init_table and this is resulting in a
boot-time warning. This patch fixes this by correcting the clk init
table.
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Move Tegra's debug-macro.S over to the common debug macro directory.
Move Tegra's debug UART selection menu into ARM's Kconfig.debug, so that
all related options are selected in the same place.
Tegra's uncompress.h is left in mach-tegra/include/mach; it will be
removed whenever Tegra is converted to multi-platform.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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In order to move Tegra's debug-macro.S to a common location for single
zImage, it must not rely on any machine-specific header files such as
<mach/iomap.h>. Duplicate the few physical address definitions that
debug-macro.S relies upon directly into the file.
To avoid tegra_io_desc[] requiring shared knowledge of the UART
mapping's virtual address, use a virtual address outside the ranges
in tegra_io_desc[]. Call debug_ll_io_init() to propagate the mapping
beyond the early pages tables.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Prior to this change, Tegra's debug-macro.S relied on uncompress.h having
determined which UART to use, and whether it was safe to use the UART
(i.e. is it not in reset, and is clocked). This determination was
communicated from uncompress.h to debug-macro.S using a few bytes of
Tegra's IRAM (an on-SoC RAM). This had the disadvantage that uncompress.h
was a required part of the kernel boot process; booting a non-compressed
kernel would not allow earlyprintk to operate.
This change duplicates the UART selection and validation logic into
debug-macro.S so that the reliance on uncompress.h is removed.
This also helps out with single-zImage work, since there is currently no
support for using any uncompress.h with single-zImage.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Delete CONFIG_TEGRA_DEBUG_UART_AUTO_SCRATCH; it's not useful any more:
* No upstream bootloader currently or will ever support this option.
* CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA is a much more direct alternative.
Merge the fixed and automatic UART selection menus into a single choice
for simplicity; now you either pick AUTO_ODMDATA or a single fixed UART,
rather than potentially having an AUTO option override whatever fixed
option was chosen.
Remove TEGRA_DEBUG_UART_NONE; if you don't want a Tegra DEBUG_LL UART,
simply don't turn on DEBUG_LL. NONE used to be the default option, so
pick AUTO_ODMDATA as the new default.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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SPARSE_IRQ is required for single zImage support.
With this enabled, we can delete <mach/irqs.h>. This requires removing
one unnecessary include of that file, and hard-coding the PCIe IRQ into
the PCIe driver. This is a hack that will be dealt with as part of
converting the PCIe driver into a true DT-supporting driver.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Modify Tegra's timer code to parse the IO address from device tree,
hence removing the dependency on <mach/iomap.h>. This will allow the
driver to be moved to drivers/clocksource/.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Modify Tegra's timer code to parse the Tegra timer IRQ from device tree,
and to instantiate the TWD from device tree, rather than relying on hard-
coded values from <mach/irqs.h>.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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This prevents checkpatch complaining when this file is moved in a later
patch.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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The L2 RAM is in different power domain from the CPU cluster. So the
L2 content can be retained over CPU suspend/resume. To do that, we
need to disable L2 after the MMU is disabled, and enable L2 before
the MMU is enabled. But the L2 controller is in the same power domain
with the CPU cluster. We need to restore it's settings and re-enable
it after the power be resumed.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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This is a power gating idle mode. It support power gating vdd_cpu rail
after all cpu cores in "powered-down" status. For Tegra30, the CPU0 can
enter this state only when all secondary CPU is offline. We need to take
care and make sure whole secondary CPUs were offline and checking the
CPU power gate status. After that, the CPU0 can go into "powered-down"
state safely. Then shut off the CPU rail.
Be aware of that, you may see the legacy power state "LP2" in the code
which is exactly the same meaning of "CPU power down".
Base on the work by:
Scott Williams <scwilliams@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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The flow controller can help CPU to go into suspend mode (powered-down
state). When CPU go into powered-down state, it needs some careful
settings before getting into and after leaving. The enter and exit
functions do that by configuring appropriate mode for flow controller.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Add suspend, resume and rail_off_ready API into tegra_cpu_car_ops. These
functions were used for CPU powered-down state maintenance. One thing
needs to notice the rail_off_ready API only availalbe for cpu_g cluster
not cpu_lp cluster.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Enable csite (debug and trace controller) clock at init to prevent it
be disabled. And this also the necessary clock for CPU be brought up or
resumed from a power-gating low power state.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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This supports power-gated idle on secondary CPUs for Tegra30. The
secondary CPUs can go into powered-down state independently. When
CPU goes into this state, it saves it's contexts and puts itself
to flow controlled WFI state. After that, it will been power gated.
Be aware of that, you may see the legacy power state "LP2" in the
code which is exactly the same meaning of "CPU power down".
Based on the work by:
Scott Williams <scwilliams@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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The CPU suspending on Tegra means CPU power gating. We add a resume
function for taking care the CPUs that resume from power gating status.
This function was been hooked to the reset handler. We take care
everything here before go into kernel.
Be aware of that, you may see the legacy power status "LP2" in the code
which is exactly the same meaning of "CPU power down".
Based on the work by:
Scott Williams <scwilliams@nvidia.com>
Colin Cross <ccross@android.com>
Gary King <gking@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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The different Tegra chips may have different CPU idle states and data.
Individual CPU idle driver make it more easy to maintain.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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For the naming consistency under the mach-tegra, we re-name the file of
"sleep-tXX" to "sleep-tegraXX" (e.g., sleep-t30 to sleep-tegra30).
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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The Tegra CPU idle LP3 state is doing ARM WFI only. So it's same with
the common ARM_CPUIDLE_WFI_STATE. Using it to replace LP3 now.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Setup the clock parents for the two display controllers and HDMI.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Add the OF_DEV_AUXDATA table entries required to associate the proper
names with host1x and its children. In turn, this allows the devices to
find the required clocks.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Extend the pll_d frequency table with a few entries to support common
HDMI and LVDS display modes and setup the clock parents for the two
display controllers and HDMI.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Add the OF_DEV_AUXDATA table entries required to associate the proper
names with host1x and its children. In turn, this allows the devices to
find the required clocks.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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This patch adds speedo-based process identification support for Tegra30.
Signed-off-by: Danny Huang <dahuang@nvidia.com>
[swarren s/Tegra3/Tegra30/ in log print,
s/T30/Tegra30/ in commit description]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Detect CPU and core process ID by checking speedo corner tables.
This can provide a more accurate process ID.
Signed-off-by: Danny Huang <dahuang@nvidia.com>
[swarren s/Tegra2/Tegra20/ in log print]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Change the spare fuse base from a definition to a variable.
It provides flexibilty to read spare fuse on different chip.
Signed-off-by: Danny Huang <dahuang@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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This patch implements ARM linux patch 6395/1 for Tegra. See commit
1a8e41c "ARM: 6395/1: VExpress: Set bit 22 in the PL310 (cache
controller) AuxCtlr register" for details.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
[swarren: added commit subject for referenced patch]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Add OF_DEV_AUXDATA for sflash controller driver for Tegra20
board dt files.
Set the parent clock of sflash controller to PLLP and configure
clock to 20MHz.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Enable the data prefetch on L2. The bit28 in aux ctrl register.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
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Add OF_DEV_AUXDATA for slink driver for Tegra20 and Tegra30
board dt files.
Set the parent clock of slink controller to PLLP and configure
clock to 100MHz.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Moving L2 cache init to DT support.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Adding the AHB and APB bus clock for Tegra30.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Set up the wlan clock tree for Tegra20 and Tegra30.
Signed-off-by: Wei Ni <wni@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Nothing outside mach-tegra uses this file, so there's no need for it to
be in <mach/>.
Since uncompress.h and debug-macro.S remain in include/mach, they need
to include "../../irammap.h" becaue of this change. Both these usages
will be removed shortly, when Tegra's DEBUG_LL implementation is updated
not to pass information through IRAM.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Nothing outside mach-tegra uses this file, so there's no need for it to
be in <mach/>.
Since uncompress.h and debug-macro.S remain in include/mach, they need
to include "../../iomap.h" becaue of this change. uncompress.h will soon
be deleted in later multi-platform/single-zImage patches. debug-macro.S
will need to continue to include this header using an explicit relative
path, to avoid duplicating the physical->virtual address mapping that
iomap.h dictates.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Remove includes of <mach/dma.h> from sound/soc; nothing from it is used.
Remove include of <mach/dma.h> from mach-tegra/apbio.c; since the DMA
transfers made by this file don't need flow-control with any peripheral,
there's no need to set any slave ID.
Once those changes are made, there are no remaining users of <mach/dma.h>
so remove it. Drivers should get this information from device tree. This
removal is necessary for single zImage.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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We wish to empty arch/arm/mach-tegra/include/mach/ as much as possible
to enable single zImage. Move tegra-ahb.h to a more central location
(suggested by Arnd, OK'd by Greg KH), and actually make tegra-ahb.c
include the header to ensure client and provider agree on the prototype.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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This should make it easier to delete or move <mach/*.h>; something that
is useful for single-zImage.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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This undoes commit 20f4665 "ARM: tegra: remove tegra_timer from
tegra_list_clks" by bringing back the tegra_timer clock. tegra_timer is
indeed a clock (hidden by the PERIPH_CLK macro) which should be added
to the tegra_list_clks.
The above commit caused tegra_init_timer() failing to get the clk
reference.
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
[swarren: added the reverted commit's subject to this patch description]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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The timer variable is renamed to avoid confusion and symbol name clash
with the tegra_timer clock.
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Change the type of variable from "unsigned long" to "u64".
This avoids the overflow while clock rate calculating.
Signed-off-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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As suggested by Andrew Morton:
This is a pet peeve of mine. Any time there's a long list of items
(header file inclusions, kconfig entries, array initalisers, etc) and
someone wants to add a new item, they *always* go and stick it at the
end of the list.
Guys, don't do this. Either put the new item into a randomly-chosen
position or, probably better, alphanumerically sort the list.
lets sort all our select statements alphanumerically. This commit was
created by the following perl:
while (<>) {
while (/\\\s*$/) {
$_ .= <>;
}
undef %selects if /^\s*config\s+/;
if (/^\s+select\s+(\w+).*/) {
if (defined($selects{$1})) {
if ($selects{$1} eq $_) {
print STDERR "Warning: removing duplicated $1 entry\n";
} else {
print STDERR "Error: $1 differently selected\n".
"\tOld: $selects{$1}\n".
"\tNew: $_\n";
exit 1;
}
}
$selects{$1} = $_;
next;
}
if (%selects and (/^\s*$/ or /^\s+help/ or /^\s+---help---/ or
/^endif/ or /^endchoice/)) {
foreach $k (sort (keys %selects)) {
print "$selects{$k}";
}
undef %selects;
}
print;
}
if (%selects) {
foreach $k (sort (keys %selects)) {
print "$selects{$k}";
}
}
It found two duplicates:
Warning: removing duplicated S5P_SETUP_MIPIPHY entry
Warning: removing duplicated HARDIRQS_SW_RESEND entry
and they are identical duplicates, hence the shrinkage in the diffstat
of two lines.
We have four testers reporting success of this change (Tony, Stephen,
Linus and Sekhar.)
Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Pull ARM SoC fixes from Olof Johansson:
"A series of fixes (and in some cases, some cleanups):
Via Tony Lindgren:
- A collection of OMAP regression fixes, in particular because
firmware no longer sets up all pin states before starting the
kernel.
- cpufreq fixes for OMAP (Rafael is on vacation and this was
pre-agreed).
- A longer series of misc regression fixes and cleanups, warning
removals, etc for OMAP
From Arnd Bergmann:
- A series of warning fixes for various platforms (defconfig builds)
Misc:
- A couple of tegra fixes, one for i.MX, some vt8500 fixes, etc."
* tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (73 commits)
ARM: pxa: armcore: fix PCI PIO warnings
ARM: integrator: use __iomem pointers for MMIO, part 2
ARM: assabet: fix bogus warning in get_assabet_scr (again)
ARM: shmobile: mark shmobile_init_late as __init
ARM: integrator_cp: fix build failure
ARM: OMAP4/AM335x: hwmod: fix disable_module regression in hardreset handling
ARM: OMAP3: fix workaround for EMU clockdomain
arm/omap: Replace board_ref_clock with enum values
ARM: OMAP2+: remove duplicated include from board-omap3stalker.c
arch/arm/plat-omap/omap-pm-noop.c: Remove unecessary semicolon
arch/arm/mach-omap2: Remove unecessary semicolon
arch/arm/mach-omap1/devices.c: Remove unecessary semicolon
ARM/dts: omap5-evm: pinmux configuration for audio
ARM/dts: Add pinctrl driver entries for omap5
ARM/dts: omap4-panda: pinmux configuration for audio
ARM/dts: omap4-sdp: pinmux configuration for audio
ARM/dts: omap5-evm: Disable unused McBSP3
ARM/dts: omap4-sdp: Disable unused McBSP3
ARM/dts: omap4-panda: Disable unused audio IPs
ARM: OMAP: board-omap4panda: Pin mux configuration for audio needs
...
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git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound updates from Takashi Iwai:
"This contains pretty many small commits covering fairly large range of
files in sound/ directory. Partly because of additional API support
and partly because of constantly developed ASoC and ARM stuff.
Some highlights:
- Introduced the helper function and documentation for exposing the
channel map via control API, as discussed in Plumbers; most of PCI
drivers are covered, will follow more drivers later
- Most of drivers have been replaced with the new PM callbacks (if
the bus is supported)
- HD-audio controller got the support of runtime PM and the support
of D3 clock-stop. Also changing the power_save option in sysfs
kicks off immediately to enable / disable the power-save mode.
- Another significant code change in HD-audio is the rewrite of
firmware loading code. Other than that, most of changes in
HD-audio are continued cleanups and standardization for the generic
auto parser and bug fixes (HBR, device-specific fixups), in
addition to the support of channel-map API.
- Addition of ASoC bindings for the compressed API, used by the
mid-x86 drivers.
- Lots of cleanups and API refreshes for ASoC codec drivers and
DaVinci.
- Conversion of OMAP to dmaengine.
- New machine driver for Wolfson Microelectronics Bells.
- New CODEC driver for Wolfson Microelectronics WM0010.
- Enhancements to the ux500 and wm2000 drivers
- A new driver for DA9055 and the support for regulator bypass mode."
Fix up various arm soc header file reorg conflicts.
* tag 'sound-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (339 commits)
ALSA: hda - Add new codec ALC283 ALC290 support
ALSA: hda - avoid unneccesary indices on "Headphone Jack" controls
ALSA: hda - fix indices on boost volume on Conexant
ALSA: aloop - add locking to timer access
ALSA: hda - Fix hang caused by race during suspend.
sound: Remove unnecessary semicolon
ALSA: hda/realtek - Fix detection of ALC271X codec
ALSA: hda - Add inverted internal mic quirk for Lenovo IdeaPad U310
ALSA: hda - make Realtek/Sigmatel/Conexant use the generic unsol event
ALSA: hda - make a generic unsol event handler
ASoC: codecs: Add DA9055 codec driver
ASoC: eukrea-tlv320: Convert it to platform driver
ALSA: ASoC: add DT bindings for CS4271
ASoC: wm_hubs: Ensure volume updates are handled during class W startup
ASoC: wm5110: Adding missing volume update bits
ASoC: wm5110: Add OUT3R support
ASoC: wm5110: Add AEC loopback support
ASoC: wm5110: Rename EPOUT to HPOUT3
ASoC: arizona: Add more clock rates
ASoC: arizona: Add more DSP options for mixer input muxes
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git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull IOMMU updates from Joerg Roedel:
"This time the IOMMU updates contain a bunch of fixes and cleanups to
various IOMMU drivers and the DMA debug code. New features are the
code for IRQ remapping support with the AMD IOMMU (preperation for
that was already merged in the last release) and a debugfs interface
to export some statistics in the NVidia Tegra IOMMU driver."
* tag 'iommu-updates-v3.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (27 commits)
iommu/amd: Remove obsolete comment line
dma-debug: Remove local BUS_NOTIFY_UNBOUND_DRIVER define
iommu/amd: Fix possible use after free in get_irq_table()
iommu/amd: Report irq remapping through IOMMU-API
iommu/amd: Print message to system log when irq remapping is enabled
iommu/irq: Use amd_iommu_irq_ops if supported
iommu/amd: Make sure irq remapping still works on dma init failure
iommu/amd: Add initialization routines for AMD interrupt remapping
iommu/amd: Add call-back routine for HPET MSI
iommu/amd: Implement MSI routines for interrupt remapping
iommu/amd: Add IOAPIC remapping routines
iommu/amd: Add routines to manage irq remapping tables
iommu/amd: Add IRTE invalidation routine
iommu/amd: Make sure IOMMU is not considered to translate itself
iommu/amd: Split device table initialization into irq and dma part
iommu/amd: Check if IOAPIC information is correct
iommu/amd: Allocate data structures to keep track of irq remapping tables
iommu/amd: Add slab-cache for irq remapping tables
iommu/amd: Keep track of HPET and IOAPIC device ids
iommu/amd: Fix features reporting
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