aboutsummaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/i915_reg.h
AgeCommit message (Expand)Author
2011-03-23drm/i915: Replace vblank PM QoS with "Interrupt-Based AGPBUSY#"Chris Wilson
2011-03-10drm/i915: Revive combination mode for backlight controlTakashi Iwai
2011-03-06drm/i915: Do not overflow the MMADDR write FIFOChris Wilson
2011-02-21drm/i915: Do not handle backlight combination mode speciallyIndan Zupancic
2011-02-02drm/i915: Invalidate TLB caches on SNB BLT/BSD ringsChris Wilson
2011-01-18drm/i915: make the blitter report buffer modifications to the FBC unitJesse Barnes
2011-01-18drm/i915: set more FBC chicken bitsJesse Barnes
2011-01-11drm/i915: detect & report PCH display error interruptsJesse Barnes
2011-01-11drm/i915: re-enable rc6 support for Ironlake+Jesse Barnes
2011-01-11drm/i915: Mask USER interrupts on gen6 (until required)Chris Wilson
2011-01-11drm/i915: support low power watermarks on IronlakeJesse Barnes
2011-01-11drm/i915: support overclocking on Sandy BridgeJesse Barnes
2011-01-11drm/i915: fix calculation of eDP signal levels on SandybridgeYuanhan Liu
2011-01-05Merge branch 'master' of /home/airlied/kernel/linux-2.6 into drm-core-nextDave Airlie
2010-12-23drm/i915: Verify Ironlake eDP presence on DP_A using the capability fuseChris Wilson
2010-12-23drm/i915: Set the required VFMUNIT clock gating disable on Ironlake.Eric Anholt
2010-12-18drm/i915: dynamic render p-state support for Sandy BridgeJesse Barnes
2010-12-16drm/i915: Add support for precise vblank timestamping (v2)Mario Kleiner
2010-12-15drm/i915: Add frame buffer compression on SandybridgeYuanhan Liu
2010-12-15drm/i915: Add self-refresh support on SandybridgeYuanhan Liu
2010-12-09drm/i915: Enable RC6 autodownclocking on SandybridgeChris Wilson
2010-12-09drm/i915: Terminate the FORCE WAKE after we have finished readingChris Wilson
2010-12-05drm/i915: Implement GPU semaphores for inter-ring synchronisation on SNBChris Wilson
2010-12-05drm/i915: Enable CB tuning of the Display PLLChris Wilson
2010-12-02Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson
2010-12-02drm/i915: Always set the DP transcoder config to 8BPC.Eric Anholt
2010-11-25drm/i915: Add a mechanism for pipelining fence register updatesDaniel Vetter
2010-11-22drm/i915: Add support for GPU reset on gen6.Eric Anholt
2010-11-22drm/i915: Capture interesting display registers on errorChris Wilson
2010-11-11drm/i915: Remove the definitions for Primary Ring BufferChris Wilson
2010-11-11drm/i915/ringbuffer: set FORCE_WAKE bit before reading ring registerZou Nan hai
2010-11-08drm/i915: Apply display workaround required according to the B-Spec.Eric Anholt
2010-11-08drm/i915: Apply B-spec mandated workaround for read flushes on Ironlake.Eric Anholt
2010-10-29drm/i915: Record BSD engine error stateChris Wilson
2010-10-29drm/i915: Record BLT engine error stateChris Wilson
2010-10-27drm/i915: Capture ERROR register on Sandybridge hangsChris Wilson
2010-10-22i915: enable AVI infoframe for intel_hdmi.c [v4]David Härdeman
2010-10-21drm/i915: Enable SandyBridge blitter ringChris Wilson
2010-10-19drm/i915: Remove duplicate set of ADPA definitionsChris Wilson
2010-10-08drm/i915: Update hotplug interrupts register definitions for SandybridgeYuanhan Liu
2010-10-08drm/i915: diasable clock gating for the panel power sequencerJesse Barnes
2010-10-08drm/i915: add Ironlake clock gating workaround for FDI link trainingJesse Barnes
2010-10-08drm/i915/dp: eDP power sequencing fixesJesse Barnes
2010-10-03Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson
2010-10-01drm/i915: Try to reset gen2 devices.Chris Wilson
2010-09-25drm/i915: kill per-ring macrosDaniel Vetter
2010-09-25drm/i915: kill now unnecessary gtt defines from i915_reg.hDaniel Vetter
2010-09-21drm/i915: add relative ring register macrosDaniel Vetter
2010-09-21drm/i915: kill duplicated/unneeded register definesDaniel Vetter
2010-09-21drm/i915: add a new BSD ring buffer for SandybridgeXiang, Haihao
generated by cgit v1.2.3 (git 2.25.1) at 2024-04-27 10:13:13 +0000