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authorTony Luck <tony.luck@intel.com>2005-06-08 12:12:48 -0700
committerTony Luck <tony.luck@intel.com>2005-06-08 12:12:48 -0700
commit86ebacd360767f6a5cf9c8810977593dccf3f3da (patch)
tree9ee60c8036dcf3a260ce18580517c5a8dfe00b6b /arch
parent866ba633a81c1e179038f7527809d9513160a6f7 (diff)
[IA64] Update comment to describe modes set in default control register.
Christian Hildner pointed out that the comment did not match what the code does in cpu_init() when we set up the default control register. Patch based on suggestions from Ken Chen. Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/ia64/kernel/setup.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c
index b7e6b4cb374..d14692e0920 100644
--- a/arch/ia64/kernel/setup.c
+++ b/arch/ia64/kernel/setup.c
@@ -720,7 +720,8 @@ cpu_init (void)
ia64_set_kr(IA64_KR_PT_BASE, __pa(ia64_imva(empty_zero_page)));
/*
- * Initialize default control register to defer all speculative faults. The
+ * Initialize default control register to defer speculative faults except
+ * for those arising from TLB misses, which are not deferred. The
* kernel MUST NOT depend on a particular setting of these bits (in other words,
* the kernel must have recovery code for all speculative accesses). Turn on
* dcr.lc as per recommendation by the architecture team. Most IA-32 apps