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authorVirupax Sadashivpetimath <virupax.sadashivpetimath@stericsson.com>2010-05-28 12:59:34 +0530
committerJohn Rigby <john.rigby@linaro.org>2010-09-02 22:45:27 -0600
commit3498e32c0746e1277c11fbb971a7fe8bcf2c3f3d (patch)
treeba85108c9a27fec4aab8cf45a593ea1672bf09e4 /arch
parentd37b6a5d9c33769b88080e9a53e3c13e158588ce (diff)
downloadlinux-2.6.34-ux500-3498e32c0746e1277c11fbb971a7fe8bcf2c3f3d.tar.gz
fix htmldoc warnings
Patch to fix the htmldoc warnings in various kernel files. Signed-off-by: Virupax Sadashivpetimath <virupax.sadashivpetimath@stericsson.com> Signed-off-by: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com> Change-Id: I435b9cc0e42640a1e43d5c5471667c4afb3eb883 Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/2361 Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
Diffstat (limited to 'arch')
-rwxr-xr-xarch/arm/mach-ux500/dma_40.c11
-rwxr-xr-xarch/arm/mach-ux500/include/mach/dma_40-8500.h15
-rwxr-xr-xarch/arm/mach-ux500/include/mach/mmc.h1
-rwxr-xr-xarch/arm/mach-ux500/include/mach/prcmu-fw-api.h3
4 files changed, 24 insertions, 6 deletions
diff --git a/arch/arm/mach-ux500/dma_40.c b/arch/arm/mach-ux500/dma_40.c
index 6f3d677b0b7..a3e5be284e0 100755
--- a/arch/arm/mach-ux500/dma_40.c
+++ b/arch/arm/mach-ux500/dma_40.c
@@ -65,6 +65,8 @@ struct dma_addr {
/**
* struct elem_pool - Structure of element pool
* @name: Name of the Element pool
+ * @pool_lock: Lock to synchronise access to struct elem_pool
+ * variables.
* @allocation_map: Whether a pool element is allocated or not
* @lchan_allocation_map: Pool allocation map for Logical channels,
* (for each phy res)
@@ -91,6 +93,7 @@ struct elem_pool {
/**
* struct dma_driver_data - DMA driver private data structure
* @reg_base: pointer to DMA controller Register area
+ * @clk: clock for the DMA device.
* @dma_chan_info: Array of pointer to channel info structure.
* It is used by DMA driver internally to access information
* of each channel (Physical or Logical). It is accessed in
@@ -99,7 +102,7 @@ struct elem_pool {
* access channel info structure when client makes a request.
* pipe_id used by client in all requests is an entry
* in this array.
- * @pipe_id_map: Map from where we allocate ID's to client drivers.
+ * pipe_id_map: Map from where we allocate ID's to client drivers.
* If a particular bit is set in this map, it means that
* particular id can be given to a client.
* @pipe_id_lock: Mutex to provide access to pipe_id_map
@@ -107,12 +110,12 @@ struct elem_pool {
* whether physical channel or Logical channel.
* If Logical then count of how many channels are there
* @pr_info_lock: Lock to synchronise access to pr_info
- * @cfg_lock: Lock to synchronize access to write on DMA registers
* @lchan_params_base: Base address where logical channel params are
* stored.
* @pchan_lli_pool: Pool from where LLI's are allocated for phy channels
* @sg_pool: Pool from where SG blocks are allocated to keep SG info
* @lchan_lli_pool: Pool from where LLI's are allocated for Log channels
+ * @cfg_ch_lock: Lock to synchronize access to write on DMA registers
* @backup_regs: Used to store and restore DMA regs during suspend resume.
*
**/
@@ -2383,8 +2386,8 @@ static int set_std_log_channel_params_mem(struct dma_channel_info *info)
/**
* process_dma_pipe_info() - process the DMA channel info sent by user
- * @pipe_id: Channel Id for which this information is to be set
- * @pipe_info: Information struct of the given channel given by user
+ * @info: Information of the channel parameters.
+ * @pipe_info: Information struct of the given channel given by user
* This function processes info supplied by the client driver. It stores
* the required info in to it;s internal data structure.
* It returns 0 on success and -1 on failure
diff --git a/arch/arm/mach-ux500/include/mach/dma_40-8500.h b/arch/arm/mach-ux500/include/mach/dma_40-8500.h
index 4ba9b79f95d..4858609ad62 100755
--- a/arch/arm/mach-ux500/include/mach/dma_40-8500.h
+++ b/arch/arm/mach-ux500/include/mach/dma_40-8500.h
@@ -662,6 +662,14 @@ struct dma_half_channel_info {
* manage state of a DMA channel.
*
* @device_id: Name of the device
+ * @src_cfg: Value to be written to the Standard channel
+ * source configuration register.
+ * @dst_cfg: Value to be written to the Standard channel
+ * destination configuration register.
+ * @dmac_lcsp3: Value to be written to the Logical channel
+ * standard param register3.
+ * @dmac_lcsp1: Value to be written to the Logical channel
+ * standard param register1.
* @pipe_id: Pipe Id allocated to the client driver.
* @channel_id: Channel Id allocated for the client,
* used internally by DMA Driver(when interrupt comes)
@@ -674,6 +682,8 @@ struct dma_half_channel_info {
* @src_addr: Src address for single DMA
* @dst_addr: Dest address for single DMA
* @xfer_len: Length of transfer expressed in Bytes
+ * @src_xfer_elem: Number of source elements to be transferred.
+ * @dst_xfer_elem: Number of destination elements to be transferred.
* @current_sg: Pointer to current SG element being used for xfer(only active
* if TIM_MASK is set)
* @lli_interrupt: 1 if interrupts generated for each LLI
@@ -698,11 +708,14 @@ struct dma_half_channel_info {
* @priority: Priority for this channel
* @security: security for this channel
* @bytes_xfred: Number of Bytes xfered till now
- * @ch_status:
+ * @ch_status: DMA channel status.
* @src_dev_type: Device type of Source
* @dst_dev_type: Device type of Dest
* @src_info: Parameters describing source half channel
* @dst_info: Parameters describing dest half channel
+ * @infinite_xfer: Perform an infinite dma transfer.
+ * @cfg_lock: Lock to synchronise access to struct dma_channel_info
+ * elements.
* This is a private data structure of DMA driver used to maintain
* state information of a particular channel
*/
diff --git a/arch/arm/mach-ux500/include/mach/mmc.h b/arch/arm/mach-ux500/include/mach/mmc.h
index 90217c92a8f..115f16ea741 100755
--- a/arch/arm/mach-ux500/include/mach/mmc.h
+++ b/arch/arm/mach-ux500/include/mach/mmc.h
@@ -257,6 +257,7 @@
* @level_shifter: variable for checking level shifter
* @dma: ponter to dma_addr_t structure
* @caps: host capabilities
+ * @bus_resume_flags: Type of MMC bus resume requested.
* @sg_len: scatter gather length
* @sg_off: offset address
* @size: data size
diff --git a/arch/arm/mach-ux500/include/mach/prcmu-fw-api.h b/arch/arm/mach-ux500/include/mach/prcmu-fw-api.h
index 5f0b2437b84..58efab7f85c 100755
--- a/arch/arm/mach-ux500/include/mach/prcmu-fw-api.h
+++ b/arch/arm/mach-ux500/include/mach/prcmu-fw-api.h
@@ -46,7 +46,8 @@ enum hw_acc_dev{
/**
* union sia_sva_pwron_enable_t - Power ON for SIA-SVA
- * @req_field:
+ * @req_field: requested state for hardware semaphore,
+ * ab4500 fifo.
* @complete_field:
*
*/