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authorDavid Mosberger-Tang <davidm@hpl.hp.com>2005-02-18 19:09:00 -0700
committerTony Luck <tony.luck@intel.com>2005-05-03 11:27:33 -0700
commit2074615a13a4f250e0a4e3f6ec8e3733b950a783 (patch)
tree20af73cd640c88f5bedcb081fd5e850bf23b7b86 /arch
parent43cc67251882f60c796c8729cefc0e05b550976c (diff)
[IA64] use fc.i for fluch_icache_range()
This is a small patch to switch fluch_icache_range() to use fc.i instead of fc. This would save time on processors which can establish i-cache coherency without flushing the cache-line out to memory (not that any current processors do). On existing processors, fc.i behaves like fc. The only caveat is that very old assemblers may not know about fc.i yet. Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/ia64/lib/flush.S6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/ia64/lib/flush.S b/arch/ia64/lib/flush.S
index 29c802b1966..a1af9146cfd 100644
--- a/arch/ia64/lib/flush.S
+++ b/arch/ia64/lib/flush.S
@@ -1,8 +1,8 @@
/*
* Cache flushing routines.
*
- * Copyright (C) 1999-2001 Hewlett-Packard Co
- * Copyright (C) 1999-2001 David Mosberger-Tang <davidm@hpl.hp.com>
+ * Copyright (C) 1999-2001, 2005 Hewlett-Packard Co
+ * David Mosberger-Tang <davidm@hpl.hp.com>
*/
#include <asm/asmmacro.h>
#include <asm/page.h>
@@ -26,7 +26,7 @@ GLOBAL_ENTRY(flush_icache_range)
mov ar.lc=r8
;;
-.Loop: fc in0 // issuable on M0 only
+.Loop: fc.i in0 // issuable on M2 only
add in0=32,in0
br.cloop.sptk.few .Loop
;;