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2012-08-14ARM: add Raspberry Pi model B board, using BCM2835 SoClost-arm-commitsStephen Warren
The Raspberry Pi model B uses the BCM2835 SoC, has 256MB of RAM, contains an SMSC 9512 USB LAN/Hub chip, and various IO connectors. For more details, see http://www.raspberrypi.org/. Various portions (cache enable, MACH_TYPE setup, RAM size limit, stack relocation to top of RAM) extracted from work by: Oleksandr Tymoshenko <gonzo@bluezbox.com>. GPIO driver enablement by Vikram Narayanan <vikram186@gmail.com>. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Tom Rini <trini@ti.com>
2012-08-14ARM: add basic support for the Broadcom BCM2835 SoCStephen Warren
This SoC is used in the Raspberry Pi, for example. For more details, see: http://www.broadcom.com/products/BCM2835 http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf. Initial support is enough to boot to a serial console, execute a minimal set of U-Boot commands, download data over a serial port, and boot a Linux kernel. No storage or network drivers are implemented. GPIO driver originally by Vikram Narayanan <vikram186@gmail.com> with many fixes from myself. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2012-08-14ARM: arm1176: enable instruction cache in arch_cpu_init()Stephen Warren
Note that this affects all users of the ARM1176 CPU that enable CONFIG_ARCH_CPU_INIT, not just the BCM2835 SoC, potentially such as tnetv107x. Cc: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2012-08-14README: fix references to config_cmd_default.hStephen Warren
All usage of config_cmd_default.h uses <> for the include statement. Update the README to do the same, rather than using "". Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2012-08-14snowball: Adding board specific cache cleanup routineMathieu J. Poirier
Following ARM's reference manuel for initializing the cache - the kernel won't boot otherwise. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org>
2012-08-14armv7: Adding cpu specific cache managmenentMathieu J. Poirier
Some CPU (i.e u8500) need more cache management before launching the Linux kernel. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org>
2012-08-14u8500: Separating mmc config parameters from driverJohn Rigby
Configuration in vexpress and u8500.v1 is different from what is needed in u8500.v2. As such, card configuration specifics need to reside in the board file rather than the driver. Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Tom Rini <trini@ti.com>
2012-08-14u8500: Enabling power to MMC device on AB8500 V2Mathieu J. Poirier
Register mapping has changed on power control chip between the first and second revision. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Tom Rini <trini@ti.com>
2012-08-14u8500: Moving processor-specific functions to cpu area.Mathieu J. Poirier
Functions such as providing power to the MMC device and reading the processor version register should be in the cpu area for access by multiple u8500-based boards. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Tom Rini <trini@ti.com>
2012-08-14snowball: applying power to LAN and GBF controllersMathieu J. Poirier
LAN and GBF need to be powered explicitely, doing so with interface to AB8500 companion chip. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org>
2012-08-14snowball: Moving to ux500.v2 addess scheme for PRCMU accessMathieu J. Poirier
Addresses between ux500.v1 and ux500.v2 have changed slightly, hence mandating a review of the PRCMU access methods. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org>
2012-08-14snowball: Adding CPU clock initialisationMathieu J. Poirier
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org>
2012-08-14snowball: Adding architecture dependent initialisationMathieu J. Poirier
Enabling timers and clocks in PRCMU and cleaning up mailbox. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org>
2012-08-14u8500: Moving prcmu to cpu directoryMathieu J. Poirier
This is to allow the prcmu functions to be used by multiple u8500-based processors. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org>
2012-08-14snowball: Add support for ux500 based snowball boardMathieu J. Poirier
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org> Acked-by: Tom Rini <trini@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2012-08-14sc_sps_1: Adjust board config to use 'mxs' SoC codeOtavio Salvador
Fix build failure due the move of mx28 code to 'mxs' SoC. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefano Babic <sbabic@denx.de>
2012-08-14rtc: imxdi: Initial supportBenoît Thébaudeau
Add support for Freescale's i.MX DryIce RTC, present on i.MX25. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
2012-08-14MX28: Add SchulerControl SC_SPS_1 platformMarek Vasut
This i.MX28 platform supports the following: * 2x FEC ethernet * USB on USBH0 * I2C EEPROM * SPI NVRAM * LEDs Signed-off-by: Marek Vasut <marex@denx.de>
2012-08-14i.MX28: bug fixes in PMU configuration codeStathis Voukelatos
Signed-off-by: Stathis Voukelatos <stathis.voukelatos@linn.co.uk> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marek.vasut@gmail.com>
2012-08-14MX28: Move the u-boot.bd info CPUDIR/SOCDIRMarek Vasut
This gets us rid of duplication of the same file. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
2012-08-14vision2: do not overwrite the consoleFabio Estevam
On this board, the console is always set to the serial line. Do not allow to overwrite it when video is enabled. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-08-14mx51evk: do not overwrite the consoleFabio Estevam
On this board, the console is always set to the serial line. Do not allow to overwrite it when video is enabled. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-08-14MX5: mx53loco: do not overwrite the consoleStefano Babic
On this board, the console is always set to the serial line. Do not allow to overwrite it when video is enabled. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-08-14MX28: Fix MXS MMC DMA issuesMarek Vasut
The DMA didn't work properly because the DMA descriptor wasn't properly cleaned after it was used once. Also, the DMA_ENABLE bit was enabled/disabled too late. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
2012-08-14MX28: Transfer small blocks via PIO in MXS MMCMarek Vasut
Large blocks (> 512b) shall be transfered via DMA to make things a bit faster. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
2012-08-14MX28: Split out the PIO and DMA transfer functionsMarek Vasut
Move DMA and PIO data transfer parts into separate functions. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
2012-08-14MX28: Fix up the MMC driver DMA modeMarek Vasut
The DMA mode didn't properly configure the DMA_ENABLE bit in CTRL1. Also, it was using SSP0 DMA channel for all SSP devices. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
2012-08-14mxs: rename mx28.c to mxs.c as it is common to i.MX233 and i.MX28 SoCsOtavio Salvador
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-08-14mxs: Clarify why we poweroff in case of brownout in 5v conflictOtavio Salvador
If VDDIO has a brownout, then the VDD5V_GT_VDDIO becomes unreliable but this wasn't clear on code so a comment has been added to clarify it. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-08-14mxs: Reowork SPL to use 'mxs' prefix for methodsOtavio Salvador
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-08-14mxs: prefix register structs with 'mxs' prefixOtavio Salvador
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-08-14mxs: prefix register acessor macros with 'mxs' prefixOtavio Salvador
As the register accessing mode is the same for all i.MXS SoCs we ought to use 'mxs' prefix intead of 'mx28'. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-08-14mxs: reorganize source directory for easy sharing of code in i.MXS SoCsOtavio Salvador
Most code can be shared between i.MX23 and i.MX28 as both are from i.MXS family; this source directory structure makes easy to share code among them. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefano Babic <sbabic@denx.de>
2012-08-14mx28evk: Turn on cachesFabio Estevam
Turn on data and instruction caches. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-08-14MX28: use a clear name for DDR2 initializationOtavio Salvador
The mx28 prefix has been added to the initialization data and function so it is clear by which SoC it is used as i.MX233 will have a specific one. While on that, we also change it to static. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Marek Vasut <marex@denx.de>
2012-08-14Add support for Bluegiga APX4 Development KitVeli-Pekka Peltola
This adds support for Bluegiga APX4 Development Kit. It is built around Freescale i.MX28. Currently supported features are: ethernet, I2C, MMC, RTC and USB. APX4 has only one ethernet port. Signed-off-by: Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com> Signed-off-by: Lauri Hintsala <lauri.hintsala@bluegiga.com> Cc: Stefano Babic <sbabic@denx.de>
2012-08-14MX28: extend print_cpuinfo() to use chip informationOtavio Salvador
The information now is gathered from HW_DIGCTL_CHIPID register and includes the chip modem and revision on the output. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-08-14MX28: SPI: Add DMA transfer supportMarek Vasut
The DMA transfers happen only if the transfered data are larger than 512 bytes. Otherwise PIO is used. This is a small speed optimization. The DMA transfer doesn't work if unaligned transfer is requested due to the limitation of the DMA controller. This has to be fixed by introducing generic bounce buffer. Therefore the DMA feature is now disabled by default. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de>
2012-08-14MX28: SPI: Pull out the PIO transfer functionMarek Vasut
Pull out all the PIO transfer logic into separate function, so DMA can be added. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de>
2012-08-14MX28: SPI: Refactor spi_xfer a bitMarek Vasut
This makes it easier to adapt for addition of DMA support. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de>
2012-08-14imx: Use a clear identification of an unidentified CPU typeOtavio Salvador
In case an unidentified CPU type is detected it now returns i.MX??, in a const char. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
2012-08-14at91: Add support for taskit AT91SAM9G20 boards.Markus Hubig
This adds support for the AT91SAM9G20 boards by taskit GmbH. Both boards, Stamp9G20 and PortuxG20, are integrated in one file. PortuxG20 is basically a SBC built around the Stamp9G20. Signed-off-by: Markus Hubig <mhubig@imko.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Andreas Bießmann <andreas.deve@googlemail.com>
2012-08-14Enable the EMAC clock in at91_macb_hw_init().Markus Hubig
Signed-off-by: Markus Hubig <mhubig@imko.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-08-14MAINTAINERS: fix Andreas Bießmann AVR32 entryAndreas Bießmann
The grasshopper board is a avr32 based device and belongs therefore to the avr32 section. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-08-14MAINTAINERS: fix entry of Ilko IlievAndreas Bießmann
These boards have ARM cores, move to the ARM section. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-08-14arm : Atmel : add at91sam9x5ek board supportBo Shen
Add at91sam9x5ek board support, this board support the following SoCs AT91SAM9G15, AT91SAM9G25, AT91SAM9G35, AT91SAM9X25, AT91SAM9X35 Using at91sam9x5ek_nandflash to configure for the board Now only supports NAND with software ECC boot up Signed-off-by: Bo Shen <voice.shen@atmel.com> [move MAINTAINERS entry to right place] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-08-14doc/git-mailrc: update at91 and avr32Andreas Bießmann
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-08-07am335x_evm: enable SMSC PHY driverIlya Yanok
Beaglebone uses SMSC PHY which works incorrectly with generic PHY driver so enable SMSC PHY driver to fix networking problems on Beaglebone. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-08-07OMAP3: fix DRAM size for IGEP-based boards.Enric Balletbò i Serra
The total RAM size of the IGEP-based boards is 512MiB not 1GiB, the LPDDR memory consist on two dies of 256MiB. Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com> Tested-by: Javier Martinez Canillas <javier@dowhile0.org>
2012-08-05DaVinci DA8xx: fix set_cpu_clk_info()Laurence Withers
For the DA8xx family of SoCs, the set_cpu_clk_info() function was not initialising the DSP frequency, leading to 'bdinfo' command output such as: [...snip...] ARM frequency = 300 MHz DSP frequency = -536870913 MHz DDR frequency = 300 MHz This commit provides a separate implementation of set_cpu_clk_info() for the DA8xx SoCs that initialises the DSP frequency to zero (since currently the DSP is not enabled by U-Boot on any DA8xx platform). The separate implementation is justified because there is no common code between DA8xx and the other SoC families. It is now much easier to understand the flow of the two separate functions. Signed-off-by: Laurence Withers <lwithers@guralp.com> Cc: Tom Rini <trini@ti.com> Cc: Hadli, Manjunath <manjunath.hadli@ti.com> Cc: Heiko Schocher <hs@denx.de>
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