diff options
Diffstat (limited to 'board/freescale/p1_p2_rdb/ddr.c')
| -rw-r--r-- | board/freescale/p1_p2_rdb/ddr.c | 25 |
1 files changed, 11 insertions, 14 deletions
diff --git a/board/freescale/p1_p2_rdb/ddr.c b/board/freescale/p1_p2_rdb/ddr.c index e54fde253..fbc46b1f4 100644 --- a/board/freescale/p1_p2_rdb/ddr.c +++ b/board/freescale/p1_p2_rdb/ddr.c @@ -1,5 +1,5 @@ /* - * Copyright 2009 Freescale Semiconductor, Inc. + * Copyright 2009, 2011 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -33,11 +33,6 @@ DECLARE_GLOBAL_DATA_PTR; extern void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, unsigned int ctrl_num); -#define DATARATE_400MHZ 400000000 -#define DATARATE_533MHZ 533333333 -#define DATARATE_667MHZ 666666666 -#define DATARATE_800MHZ 800000000 - #define CONFIG_SYS_DDR_CS0_BNDS 0x0000003F #define CONFIG_SYS_DDR_CS0_CONFIG 0x80014202 #define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000 @@ -204,27 +199,29 @@ fsl_ddr_cfg_regs_t ddr_cfg_regs_800 = { phys_size_t fixed_sdram (void) { - sys_info_t sysinfo; char buf[32]; fsl_ddr_cfg_regs_t ddr_cfg_regs; size_t ddr_size; struct cpu_type *cpu; + ulong ddr_freq, ddr_freq_mhz; + + ddr_freq = get_ddr_freq(0); + ddr_freq_mhz = ddr_freq / 1000000; - get_sys_info(&sysinfo); printf("Configuring DDR for %s MT/s data rate\n", - strmhz(buf, sysinfo.freqDDRBus)); + strmhz(buf, ddr_freq)); - if(sysinfo.freqDDRBus <= DATARATE_400MHZ) + if(ddr_freq_mhz <= 400) memcpy(&ddr_cfg_regs, &ddr_cfg_regs_400, sizeof(ddr_cfg_regs)); - else if(sysinfo.freqDDRBus <= DATARATE_533MHZ) + else if(ddr_freq_mhz <= 533) memcpy(&ddr_cfg_regs, &ddr_cfg_regs_533, sizeof(ddr_cfg_regs)); - else if(sysinfo.freqDDRBus <= DATARATE_667MHZ) + else if(ddr_freq_mhz <= 667) memcpy(&ddr_cfg_regs, &ddr_cfg_regs_667, sizeof(ddr_cfg_regs)); - else if(sysinfo.freqDDRBus <= DATARATE_800MHZ) + else if(ddr_freq_mhz <= 800) memcpy(&ddr_cfg_regs, &ddr_cfg_regs_800, sizeof(ddr_cfg_regs)); else panic("Unsupported DDR data rate %s MT/s data rate\n", - strmhz(buf, sysinfo.freqDDRBus)); + strmhz(buf, ddr_freq)); cpu = gd->cpu; /* P1020 and it's derivatives support max 32bit DDR width */ |