diff options
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/cpu_init.c | 15 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/fsl_lbc.h | 6 |
2 files changed, 20 insertions, 1 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index b517e0660..e578b296d 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -260,6 +260,10 @@ void cpu_init_f (void) int cpu_init_r(void) { +#ifdef CONFIG_SYS_LBC_LCRR + volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR); +#endif + puts ("L2: "); #if defined(CONFIG_L2_CACHE) @@ -383,6 +387,17 @@ int cpu_init_r(void) #if defined(CONFIG_MP) setup_mp(); #endif + +#ifdef CONFIG_SYS_LBC_LCRR + /* + * Modify the CLKDIV field of LCRR register to improve the writing + * speed for NOR flash. + */ + clrsetbits_be32(&lbc->lcrr, LCRR_CLKDIV, CONFIG_SYS_LBC_LCRR); + __raw_readl(&lbc->lcrr); + isync(); +#endif + return 0; } diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h index 5723de643..dfe8f793a 100644 --- a/arch/powerpc/include/asm/fsl_lbc.h +++ b/arch/powerpc/include/asm/fsl_lbc.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2004-2008 Freescale Semiconductor, Inc. + * Copyright (C) 2004-2008,2010 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -125,8 +125,12 @@ #define OR_GPCM_SETA_SHIFT 3 #define OR_GPCM_TRLX 0x00000004 #define OR_GPCM_TRLX_SHIFT 2 +#define OR_GPCM_TRLX_CLEAR 0x00000000 +#define OR_GPCM_TRLX_SET 0x00000004 #define OR_GPCM_EHTR 0x00000002 #define OR_GPCM_EHTR_SHIFT 1 +#define OR_GPCM_EHTR_CLEAR 0x00000000 +#define OR_GPCM_EHTR_SET 0x00000002 #define OR_GPCM_EAD 0x00000001 #define OR_GPCM_EAD_SHIFT 0 |