arndale5250: Boot in Hyp mode and enable architected timers

First, to boot in Hyp mode we need to change to non-secure mode, which
involves configuring the frequency of the arch. timers and setting all
interrupts on the gic to group 1 (this code was inspired by the boot
wrapper code).

Second, signal the secondary CPU while still in secure mode and have the
secondary CPU run the SPL.  The SPL checks the hardware cpu id, and if
it's a secondary CPU, it will initialize non-secure mode inside the SPL,
enter Hyp mode, and finally enter a new SMP pen with the same poking stick
interface as the regular kernel uses.

Third, on CPU0 we wait until u-boot is fully up to actually enter the
non-secure mode on CPU0, and stay in non-secure svc mode right up until
we actually load the kernel, where the last thing we do is enter Hyp
mode.

Let it roll...

Signed-off-by: Jeremy C. Andrus <jeremya@cs.columbia.edu>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>

1 files changed, 97 insertions, 0 deletions

diff --git a/board/samsung/smdk5250/monitor.S b/board/samsung/smdk5250/monitor.S
new file mode 100644
index 000000000..8bc21d8f5
--- /dev/null
+++ b/board/samsung/smdk5250/monitor.S
@@ -0,0 +1,97 @@
+/*
+ *
+ * Copyright (c) 2012	Christoffer Dall <c.dall@virtualopensystems.com>
+ * 					 <cdall@cs.columbia.edu>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+
+.syntax	unified
+.arch_extension sec
+.arch_extension virt
+.text
+
+.align 5
+
+/* We use the same vector table for Hyp and Monitor mode, since
+ * we will only use each once and they don't overlap.
+ */
+mon_vectors:
+	.word 0	/* reset */
+	.word 0	/* undef */
+	b	2f /* smc */
+	.word 0 /* pabt */
+	.word 0 /* dabt */
+	b	1f
+	.word 0 /* irq */
+	.word 0 /* fiq */
+
+/* Return directly back to the caller without leaving Hyp mode: */
+1:	mrs	lr, elr_hyp
+	mov	pc, lr
+
+/* In monitor mode, set up HVBAR and SCR then return to caller in NS-SVC. */
+2:
+	mrc	p15, 0, r1, c1, c1, 0		@ SCR
+	/*
+	 * Set SCR.NS=1 (needed for setting HVBAR and also returning to NS state)
+	 *        .IRQ,FIQ,EA=0 (don't take aborts/exceptions to Monitor mode)
+	 *        .FW,AW=1 (CPSR.A,F modifiable in NS state)
+	 *        .nET=0 (early termination OK)
+	 *        .SCD=0 (SMC in NS mode OK, so we can call secure firmware)
+	 *        .HCE=1 (HVC does Hyp call)
+	 */
+	bic	r1, r1, #0x07f
+	ldr	r2, =0x131
+	orr	r1, r1, r2
+	mcr	p15, 0, r2, c1, c1, 0		@ SCR
+	isb
+	ldr	r2, =mon_vectors
+	mcr	p15, 4, r2, c12, c0, 0		@ set HVBAR
+	/* ...and return to calling code in NS state */
+	movs	pc, lr
+
+/******************************************************************************
+ * This code is called from u-boot into the above handler
+ */
+
+	.globl monitor_init
+monitor_init:
+	ldr	ip, =mon_vectors
+	mcr	p15, 0, ip, c12, c0, 1		@ Monitor vector base address
+	mov	pc, lr
+
+	/* Try to go into NS-SVC: void enter_ns(void); */
+	.globl enter_ns
+enter_ns:
+	smc	#0
+	mov	pc, lr
+
+	/* void enter_hyp(void); */
+	.globl enter_hyp
+enter_hyp:
+	/* Now we're in NS-SVC, make a Hyp call to get into Hyp mode */
+	mov	r0, lr
+	mov	r1, sp
+	hvc	#0
+	/* We will end up here in NS-Hyp. */
+	mov	sp, r1
+	mov	pc, r0