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authorMike Frysinger <vapier@gentoo.org>2010-07-27 18:35:08 -0400
committerBen Warren <biggerbadderben@gmail.com>2010-08-09 11:52:29 -0700
commit5700bb63522c2af9276f25a15448b61f19d72841 (patch)
tree61d112f470573e55e8dc32cd02eec52d14020b7c /arch
parent78b7a8ef8b37582a37a5c2381191061380b42831 (diff)
downloadu-boot-linaro-stable-5700bb63522c2af9276f25a15448b61f19d72841.tar.gz
miiphy: constify device name
The driver name does not need to be writable, so constify it. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/cpu/arm920t/at91rm9200/ether.c4
-rw-r--r--arch/arm/cpu/ixp/npe/include/npe.h4
-rw-r--r--arch/arm/cpu/ixp/npe/miiphy.c4
-rw-r--r--arch/m68k/include/asm/fec.h4
-rw-r--r--arch/mips/cpu/au1x00_eth.c4
-rw-r--r--arch/powerpc/cpu/mpc8220/fec.c8
-rw-r--r--arch/powerpc/cpu/mpc8xx/fec.c8
-rw-r--r--arch/powerpc/cpu/ppc4xx/miiphy.c4
8 files changed, 20 insertions, 20 deletions
diff --git a/arch/arm/cpu/arm920t/at91rm9200/ether.c b/arch/arm/cpu/arm920t/at91rm9200/ether.c
index 91eab95ee..e1cdebab9 100644
--- a/arch/arm/cpu/arm920t/at91rm9200/ether.c
+++ b/arch/arm/cpu/arm920t/at91rm9200/ether.c
@@ -283,7 +283,7 @@ void eth_halt (void)
};
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
-int at91rm9200_miiphy_read(char *devname, unsigned char addr,
+int at91rm9200_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short * value)
{
at91rm9200_EmacEnableMDIO (p_mac);
@@ -292,7 +292,7 @@ int at91rm9200_miiphy_read(char *devname, unsigned char addr,
return 0;
}
-int at91rm9200_miiphy_write(char *devname, unsigned char addr,
+int at91rm9200_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
at91rm9200_EmacEnableMDIO (p_mac);
diff --git a/arch/arm/cpu/ixp/npe/include/npe.h b/arch/arm/cpu/ixp/npe/include/npe.h
index 3d6f72747..b5eef8633 100644
--- a/arch/arm/cpu/ixp/npe/include/npe.h
+++ b/arch/arm/cpu/ixp/npe/include/npe.h
@@ -82,9 +82,9 @@ struct npe {
/*
* prototypes...
*/
-extern int npe_miiphy_read (char *devname, unsigned char addr,
+extern int npe_miiphy_read (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
-extern int npe_miiphy_write (char *devname, unsigned char addr,
+extern int npe_miiphy_write (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
#endif /* ifndef NPE_H */
diff --git a/arch/arm/cpu/ixp/npe/miiphy.c b/arch/arm/cpu/ixp/npe/miiphy.c
index b208c51ea..4b0201a35 100644
--- a/arch/arm/cpu/ixp/npe/miiphy.c
+++ b/arch/arm/cpu/ixp/npe/miiphy.c
@@ -100,7 +100,7 @@ int phy_setup_aneg (char *devname, unsigned char addr)
}
-int npe_miiphy_read (char *devname, unsigned char addr,
+int npe_miiphy_read (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
u16 val;
@@ -112,7 +112,7 @@ int npe_miiphy_read (char *devname, unsigned char addr,
} /* phy_read */
-int npe_miiphy_write (char *devname, unsigned char addr,
+int npe_miiphy_write (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
ixEthAccMiiWriteRtn(addr, reg, value);
diff --git a/arch/m68k/include/asm/fec.h b/arch/m68k/include/asm/fec.h
index 49311e596..cecec59ff 100644
--- a/arch/m68k/include/asm/fec.h
+++ b/arch/m68k/include/asm/fec.h
@@ -357,9 +357,9 @@ int fecpin_setclear(struct eth_device *dev, int setclear);
void __mii_init(void);
uint mii_send(uint mii_cmd);
int mii_discover_phy(struct eth_device *dev);
-int mcffec_miiphy_read(char *devname, unsigned char addr,
+int mcffec_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
-int mcffec_miiphy_write(char *devname, unsigned char addr,
+int mcffec_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
#endif
diff --git a/arch/mips/cpu/au1x00_eth.c b/arch/mips/cpu/au1x00_eth.c
index 5074997a2..c51079961 100644
--- a/arch/mips/cpu/au1x00_eth.c
+++ b/arch/mips/cpu/au1x00_eth.c
@@ -89,7 +89,7 @@ mac_fifo_t mac_fifo[NO_OF_FIFOS];
#define MAX_WAIT 1000
#if defined(CONFIG_CMD_MII)
-int au1x00_miiphy_read(char *devname, unsigned char addr,
+int au1x00_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short * value)
{
volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL);
@@ -122,7 +122,7 @@ int au1x00_miiphy_read(char *devname, unsigned char addr,
return 0;
}
-int au1x00_miiphy_write(char *devname, unsigned char addr,
+int au1x00_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL);
diff --git a/arch/powerpc/cpu/mpc8220/fec.c b/arch/powerpc/cpu/mpc8220/fec.c
index 9a6d434db..00879dff5 100644
--- a/arch/powerpc/cpu/mpc8220/fec.c
+++ b/arch/powerpc/cpu/mpc8220/fec.c
@@ -34,8 +34,8 @@ typedef struct {
u8 head[16]; /* MAC header(6 + 6 + 2) + 2(aligned) */
} NBUF;
-int fec8220_miiphy_read (char *devname, u8 phyAddr, u8 regAddr, u16 * retVal);
-int fec8220_miiphy_write (char *devname, u8 phyAddr, u8 regAddr, u16 data);
+int fec8220_miiphy_read (const char *devname, u8 phyAddr, u8 regAddr, u16 *retVal);
+int fec8220_miiphy_write (const char *devname, u8 phyAddr, u8 regAddr, u16 data);
/********************************************************************/
#ifdef DEBUG
@@ -881,7 +881,7 @@ int mpc8220_fec_initialize (bd_t * bis)
/* MII-interface related functions */
/********************************************************************/
-int fec8220_miiphy_read (char *devname, u8 phyAddr, u8 regAddr, u16 * retVal)
+int fec8220_miiphy_read (const char *devname, u8 phyAddr, u8 regAddr, u16 *retVal)
{
ethernet_regs *eth = (ethernet_regs *) MMAP_FEC1;
u32 reg; /* convenient holder for the PHY register */
@@ -925,7 +925,7 @@ int fec8220_miiphy_read (char *devname, u8 phyAddr, u8 regAddr, u16 * retVal)
}
/********************************************************************/
-int fec8220_miiphy_write (char *devname, u8 phyAddr, u8 regAddr, u16 data)
+int fec8220_miiphy_write(const char *devname, u8 phyAddr, u8 regAddr, u16 data)
{
ethernet_regs *eth = (ethernet_regs *) MMAP_FEC1;
u32 reg; /* convenient holder for the PHY register */
diff --git a/arch/powerpc/cpu/mpc8xx/fec.c b/arch/powerpc/cpu/mpc8xx/fec.c
index 754f8db9e..d4abeb1b2 100644
--- a/arch/powerpc/cpu/mpc8xx/fec.c
+++ b/arch/powerpc/cpu/mpc8xx/fec.c
@@ -63,9 +63,9 @@ DECLARE_GLOBAL_DATA_PTR;
static int mii_discover_phy(struct eth_device *dev);
#endif
-int fec8xx_miiphy_read(char *devname, unsigned char addr,
+int fec8xx_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
-int fec8xx_miiphy_write(char *devname, unsigned char addr,
+int fec8xx_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
static struct ether_fcc_info_s
@@ -990,7 +990,7 @@ void mii_init (void)
* Otherwise they hang in mii_send() !!! Sorry!
*****************************************************************************/
-int fec8xx_miiphy_read(char *devname, unsigned char addr,
+int fec8xx_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
short rdreg; /* register working value */
@@ -1007,7 +1007,7 @@ int fec8xx_miiphy_read(char *devname, unsigned char addr,
return 0;
}
-int fec8xx_miiphy_write(char *devname, unsigned char addr,
+int fec8xx_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
short rdreg; /* register working value */
diff --git a/arch/powerpc/cpu/ppc4xx/miiphy.c b/arch/powerpc/cpu/ppc4xx/miiphy.c
index 22ed5c25e..4fec126f4 100644
--- a/arch/powerpc/cpu/ppc4xx/miiphy.c
+++ b/arch/powerpc/cpu/ppc4xx/miiphy.c
@@ -338,7 +338,7 @@ static int emac_miiphy_command(u8 addr, u8 reg, int cmd, u16 value)
return 0;
}
-int emac4xx_miiphy_read (char *devname, unsigned char addr, unsigned char reg,
+int emac4xx_miiphy_read (const char *devname, unsigned char addr, unsigned char reg,
unsigned short *value)
{
unsigned long sta_reg;
@@ -359,7 +359,7 @@ int emac4xx_miiphy_read (char *devname, unsigned char addr, unsigned char reg,
/* write a phy reg and return the value with a rc */
/***********************************************************/
-int emac4xx_miiphy_write (char *devname, unsigned char addr, unsigned char reg,
+int emac4xx_miiphy_write (const char *devname, unsigned char addr, unsigned char reg,
unsigned short value)
{
return emac_miiphy_command(addr, reg, EMAC_STACR_WRITE, value);