blob: 4f1499efbfae9d359639180a94c0f581c252d77f (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
|
/*
* Copyright (c) 2012, ARM Limited. All rights reserved.
*
* Redistribution and use in source and binary forms, with
* or without modification, are permitted provided that the
* following conditions are met:
*
* Redistributions of source code must retain the above
* copyright notice, this list of conditions and the
* following disclaimer.
*
* Redistributions in binary form must reproduce the
* above copyright notice, this list of conditions and
* the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* Neither the name of ARM nor the names of its
* contributors may be used to endorse or promote products
* derived from this software without specific prior written
* permission.
*/
#ifndef VGICLIB_H
#define VGICLIB_H
#include "gic_registers.h"
struct overflowint {
/* This is encoded in the value, but speed optimise by splitting out */
unsigned int priority;
unsigned int value;
struct overflowint *next;
};
struct gic_cpuif {
unsigned int status;
unsigned int activepris; /* Copies of the state from the VGIC itself */
unsigned int elrsr[2]; /* Copies of Empty list register status registers */
unsigned int ints[VGIC_LISTENTRIES];
struct overflowint *overflow; /* List of overflowed interrupts */
unsigned int freelist; /* Bitmask of which list entries are in use */
};
void vgic_init(void);
void vgic_savestate(unsigned int cpu);
void vgic_loadstate(unsigned int cpu);
void vgic_refresh(unsigned int cpu);
void enqueue_interrupt(unsigned int descr, unsigned int cpu);
#endif /* VGICLIB_H */
|