1 files changed, 102 insertions, 0 deletions
diff --git a/big-little/include/gic_registers.h b/big-little/include/gic_registers.h
new file mode 100644
index 0000000..92ff5c0
--- /dev/null
+++ b/big-little/include/gic_registers.h
@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2011, ARM Limited. All rights reserved.
+ *       
+ * Redistribution and use in source and binary forms, with
+ * or without modification, are permitted provided that the
+ * following conditions are met:
+ *     
+ * Redistributions of source code must retain the above
+ * copyright notice, this list of conditions and the 
+ * following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the
+ * above copyright notice, this list of conditions and 
+ * the following disclaimer in the documentation 
+ * and/or other materials provided with the distribution.
+ *      
+ * Neither the name of ARM nor the names of its
+ * contributors may be used to endorse or promote products
+ * derived from this software without specific prior written
+ * permission.                        
+ */ 
+    
+#ifndef __GIC_REGISTERS_H__
+#define __GIC_REGISTERS_H__
+    
+#include "hyp_vmmap.h"
+    
+#define MAX_INTS                   256
+    
+/* Distributor interface registers */ 
+#define GICD_CTL                     0x0
+#define GICD_CTR                     0x4
+#define GICD_SEC                    0x80
+#define GICD_ENABLESET             0x100
+#define GICD_ENABLECLEAR           0x180
+#define GICD_PENDINGSET            0x200
+#define GICD_PENDINGCLEAR          0x280
+#define GICD_ACTIVESET             0x300
+#define GICD_ACTIVECLEAR           0x380
+#define GICD_PRI                   0x400
+#define GICD_CPUS                  0x800
+#define GICD_CONFIG                0xC00
+#define GICD_SW                    0xF00
+#define GICD_CPENDSGIR             0xF10
+#define GICD_SPENDSGIR             0xF20
+    
+/* Physical CPU Interface registers */ 
+#define GICC_CTL                     0x0
+#define GICC_PRIMASK                 0x4
+#define GICC_BP                      0x8
+#define GICC_INTACK                  0xC
+#define GICC_EOI                    0x10
+#define GICC_RUNNINGPRI             0x14
+#define GICC_HIGHESTPEND            0x18
+#define GICC_DEACTIVATE             0x1000
+#define GICC_PRIODROP               GICC_EOI
+    
+/* HYP view virtual CPU Interface registers */ 
+#define GICH_CTL                     0x0
+#define GICH_VTR                     0x4
+#define GICH_ELRSR0                 0x30
+#define GICH_ELRSR1                 0x34
+#define GICH_APR0                   0xF0
+#define GICH_LR_BASE               0x100
+    
+/* GuestOS view virtual CPU Interface registers */ 
+#define GICV_CTL                     0x0
+#define GICV_PRIMASK                 0x4
+#define GICV_BP                      0x8
+#define GICV_INTACK                  0xC
+#define GICV_EOI                    0x10
+#define GICV_RUNNINGPRI             0x14
+#define GICV_HIGHESTPEND            0x18
+#define GICV_DEACTIVATE           0x1000
+    
+#define VGICH_HCR_EN                   0x1
+#define VGICV_NS_EN                    0x2
+    
+#define GS_ENABLED                    0x01
+#define GS_EDGE                       0x02
+#define GIC_INTS                       128
+#define GIC_PRIMASK                   0xF8 /* 32 levels only */
+#define GIC_DISTENABLE                 0x1
+#define GIC_CPUIFENABLE                0x2
+    
+#define VGIC_PRI                     0x200
+#define VGIC_LIST                    0x100
+#define VGIC_CONTROL                   0x0
+/*
+ * TODO:
+ * Current mechanism to find free slots uses unsigned ints
+ * and is thus restricted to storing just 32 free slots.
+ */ 
+#define VGIC_LISTENTRIES                64
+    
+#define VGIC_ENTRY_HW             0x80000000
+#define VGIC_ENTRY_ACTIVE         0x20000000
+#define VGIC_ENTRY_ACTIVE_PENDING 0x30000000
+#define VGIC_ENTRY_PENDING        0x10000000
+    
+#endif  /* __GIC_REGISTERS_H__ */
+