1 files changed, 57 insertions, 0 deletions
diff --git a/big-little/common/cci.c b/big-little/common/cci.c
new file mode 100644
index 0000000..8bf4b5f
--- /dev/null
+++ b/big-little/common/cci.c
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2011, ARM Limited. All rights reserved.
+ *       
+ * Redistribution and use in source and binary forms, with
+ * or without modification, are permitted provided that the
+ * following conditions are met:
+ *     
+ * Redistributions of source code must retain the above
+ * copyright notice, this list of conditions and the 
+ * following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the
+ * above copyright notice, this list of conditions and 
+ * the following disclaimer in the documentation 
+ * and/or other materials provided with the distribution.
+ *      
+ * Neither the name of ARM nor the names of its
+ * contributors may be used to endorse or promote products
+ * derived from this software without specific prior written
+ * permission.                        
+ */ 
+
+#include "misc.h"
+#include "virt_helpers.h"
+#include "hyp_types.h"
+
+void enable_cci_snoops(unsigned cluster_id)
+{
+        /* Turn off CCI snoops & DVM Messages */
+        if (cluster_id)
+                write32(A7_SL_IFACE_BASE + SNOOP_CTLR_REG, 0x3);
+        else
+                write32(A15_SL_IFACE_BASE + SNOOP_CTLR_REG, 0x3);
+
+        dsb();
+
+        /* Wait for the dust to settle down */
+        while (read32(CCI_BASE + STATUS_REG) & 0x1) ;
+
+        return;
+}
+
+void disable_cci_snoops(unsigned cluster_id)
+{
+        /* Turn off CCI snoops & DVM messages */
+        if (cluster_id)
+                write32(A7_SL_IFACE_BASE + SNOOP_CTLR_REG, 0x0);
+        else
+                write32(A15_SL_IFACE_BASE + SNOOP_CTLR_REG, 0x0);
+
+        dsb();
+
+        /* Wait for the dust to settle down */
+        while (read32(CCI_BASE + STATUS_REG) & 0x1) ;
+
+        return;
+}