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authorRobin Randhawa <robin.randhawa@arm.com>2011-12-20 15:54:33 +0000
committerRobin Randhawa <robin.randhawa@arm.com>2011-12-20 15:54:33 +0000
commit06193b40307e17cf6b675000abb5859838b0c841 (patch)
treebc792d2f9e8be28dd8ffc2913df4bc0cd6a2b5eb /big-little/switcher/context/ns_context.c
parent0656dea51f48c51a57e77187de4d5f66a6ba1337 (diff)
Updated to release v2.1.
Intended to be the basis for the VSM development.
Diffstat (limited to 'big-little/switcher/context/ns_context.c')
-rw-r--r--big-little/switcher/context/ns_context.c73
1 files changed, 33 insertions, 40 deletions
diff --git a/big-little/switcher/context/ns_context.c b/big-little/switcher/context/ns_context.c
index b0e1220..891f5bb 100644
--- a/big-little/switcher/context/ns_context.c
+++ b/big-little/switcher/context/ns_context.c
@@ -1,18 +1,24 @@
/*
- * $Copyright:
- * ----------------------------------------------------------------
- * This confidential and proprietary software may be used only as
- * authorised by a licensing agreement from ARM Limited
- * (C) COPYRIGHT 2008-2011 ARM Limited
- * ALL RIGHTS RESERVED
- * The entire notice above must be reproduced on all authorised
- * copies and copies may only be made to the extent permitted
- * by a licensing agreement from ARM Limited.
- * ----------------------------------------------------------------
- * File: ns_context.c
- * ----------------------------------------------------------------
- * $
- */
+ * Copyright (c) 2011, ARM Limited. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with
+ * or without modification, are permitted provided that the
+ * following conditions are met:
+ *
+ * Redistributions of source code must retain the above
+ * copyright notice, this list of conditions and the
+ * following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the
+ * above copyright notice, this list of conditions and
+ * the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * Neither the name of ARM nor the names of its
+ * contributors may be used to endorse or promote products
+ * derived from this software without specific prior written
+ * permission.
+ */
#include "virt_helpers.h"
#include "vgiclib.h"
@@ -38,12 +44,7 @@ static bakery_t lock_tube1 __attribute__ ((section("BL_DV_PAGE"))) = { 0 };
* Top level structure which encapsulates the context of the entire
* Kingfisher system
*/
-system_context switcher_context;
-
-unsigned reset_type(void)
-{
- return switcher_context.warm_reset;
-}
+system_context switcher_context = {0};
void stop_generic_timer(generic_timer_context *ctr_ctx)
{
@@ -74,7 +75,6 @@ void stop_generic_timer(generic_timer_context *ctr_ctx)
void save_context(unsigned first_cpu)
{
unsigned cpu_id = read_cpuid();
- unsigned nsacr = read_nsacr();
unsigned cluster_id = read_clusterid();
cpu_context *ns_cpu_ctx =
&switcher_context.cluster.core[cpu_id].ns_cpu_ctx;
@@ -83,27 +83,17 @@ void save_context(unsigned first_cpu)
unsigned *vfp_context = ns_cpu_ctx->vfp_regs;
banked_cp15_context *cp15_context = &ns_cpu_ctx->banked_cp15_regs;
gic_cpu_context *gic_pvt_context = &ns_cpu_ctx->gic_cpu_ctx;
- global_context *gbl_context = &switcher_context.cluster.ns_cluster_ctx;
generic_timer_context *cp15_timer_ctx = &ns_cpu_ctx->cp15_timer_ctx;
cp15_fault_regs *fault_ctx = &cp15_context->ns_cp15_fault_regs;
write_trace(&lock_tube0, NS_TUBE0, "Context Save Start", read_cntpct(), 0x0, 0x0);
/*
- * Increment the warm reset counter. This will not only indicate that
- * a cluster has been warm reset but also the number of times the
- * the switchover has taken place. Update main memory so that the
- * inbound cluster can see this flag even with its MMU off
- */
- switcher_context.warm_reset++;
- cln_dcache_mva_poc(&switcher_context.warm_reset);
-
- /*
* Good place to bring the inbound cluster out of reset, but first
* we need to save the secure world context.
*/
write_trace(&lock_tube0, NS_TUBE0, "Secure Context Save Start", read_cntpct(), 0x0, 0x0);
- smc(SMC_SEC_SAVE, (unsigned)bl_setup);
+ smc(SMC_SEC_SAVE, (unsigned) hyp_warm_reset_handler);
write_trace(&lock_tube0, NS_TUBE0, "Secure Context Save End", read_cntpct(), 0x0, 0x0);
/*
@@ -128,9 +118,16 @@ void save_context(unsigned first_cpu)
* Check if non-secure world has access to the vfp/neon registers
* and save them if so.
*/
- if (nsacr & (0x3 << 10))
+ if (read_nsacr() & (0x3 << 10))
save_vfp(vfp_context);
+
+ /*
+ * Disable the GIC CPU interface tp prevent interrupts from waking
+ * the core from wfi() subsequently.
+ */
+ write32(GIC_IC_PHY_BASE + GICC_CTL, 0x0);
+
/* Save vGIC virtual cpu interface (cpu view) context */
save_gic_interface(gic_pvt_context->gic_cpu_if_regs, VGIC_VM_PHY_BASE);
@@ -151,9 +148,6 @@ void save_context(unsigned first_cpu)
*/
save_gic_distributor_private(gic_pvt_context->gic_dist_if_pvt_regs,
GIC_ID_PHY_BASE);
- if (cpu_id == first_cpu)
- save_gic_distributor_shared(gbl_context->gic_dist_if_regs,
- GIC_ID_PHY_BASE);
/* Safe place to save the Virtualisor context */
SaveVirtualisor(first_cpu);
@@ -181,8 +175,7 @@ void restore_context(unsigned first_cpu)
{
unsigned cpu_id = read_cpuid();
unsigned cluster_id = read_clusterid();
- unsigned nsacr = read_nsacr();
- unsigned warm_reset = reset_type();
+ unsigned warm_reset = 1;
cpu_context *ns_cpu_ctx =
&switcher_context.cluster.core[cpu_id].ns_cpu_ctx;
global_context *gbl_context = &switcher_context.cluster.ns_cluster_ctx;
@@ -203,7 +196,7 @@ void restore_context(unsigned first_cpu)
* specific context can be correctly restored on the external
* vGIC.
*/
- map_cpuif();
+ map_cpuif(cluster_id, cpu_id);
SetupVGIC(warm_reset);
/*
@@ -237,7 +230,7 @@ void restore_context(unsigned first_cpu)
* Check if non-secure world has access to the vfp/neon registers
* and save them if so.
*/
- if (nsacr & (0x3 << 10))
+ if (read_nsacr() & (0x3 << 10))
restore_vfp(vfp_context);
/*