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authorSerguei Katkov <serguei.katkov@azul.com>2017-11-07 09:43:08 +0000
committerSerguei Katkov <serguei.katkov@azul.com>2017-11-07 09:43:08 +0000
commite82a7f1476b46ef61562251fdfb33083bffe30c6 (patch)
treeeda6670827aba3fa2b27c55e83e858bc6cb3dea2 /test/Transforms/CodeGenPrepare/ARM
parent51bcf5f4a57a2efc905f1003bb00c95b21d4aee8 (diff)
[CGP] Disable Select instruction handling in optimizeMemoryInst. NFC
This patch disables the handling of selects in optimization extensing scope of optimizeMemoryInst. The optimization itself is disable by default. The idea here is just to switch optimiztion level step by step. Specifically, first optimization will be enabled only for Phi nodes, then select instructions will be added. In case someone will complain about perfromance it will be easier to detect what part of optimizations is responsible for that. Differential Revision: https://reviews.llvm.org/D36073 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317555 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Transforms/CodeGenPrepare/ARM')
-rw-r--r--test/Transforms/CodeGenPrepare/ARM/sink-addrmode.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/test/Transforms/CodeGenPrepare/ARM/sink-addrmode.ll b/test/Transforms/CodeGenPrepare/ARM/sink-addrmode.ll
index a9635eb1c70..06a513543c4 100644
--- a/test/Transforms/CodeGenPrepare/ARM/sink-addrmode.ll
+++ b/test/Transforms/CodeGenPrepare/ARM/sink-addrmode.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -codegenprepare -mtriple=thumbv7m -disable-complex-addr-modes=false < %s | FileCheck %s
+; RUN: opt -S -codegenprepare -mtriple=thumbv7m -disable-complex-addr-modes=false -addr-sink-new-select=true < %s | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"