diff options
author | Tim Renouf <tim.renouf@amd.com> | 2017-09-29 09:51:22 +0000 |
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committer | Tim Renouf <tim.renouf@amd.com> | 2017-09-29 09:51:22 +0000 |
commit | 8ba98f908f0e471a51ed73bc847bc778af024eab (patch) | |
tree | cdb1bf7d7822eae3c42def7c0bbe1127e1ef9155 /include | |
parent | 2532de2a09ebea2968970069c04ac1045cc41dbd (diff) |
[AMDGPU] calling conventions for AMDPAL OS type
Summary:
This commit adds comments on how the AMDPAL OS type overloads the
existing AMDGPU_ calling conventions used by Mesa, and adds a couple of
new ones.
Reviewers: arsenm, nhaehnle, dstuttard
Subscribers: mehdi_amini, kzhuravl, wdng, yaxunl, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D37752
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314502 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
-rw-r--r-- | include/llvm/IR/CallingConv.h | 23 |
1 files changed, 17 insertions, 6 deletions
diff --git a/include/llvm/IR/CallingConv.h b/include/llvm/IR/CallingConv.h index 850964afc30..84fe836adc3 100644 --- a/include/llvm/IR/CallingConv.h +++ b/include/llvm/IR/CallingConv.h @@ -183,16 +183,18 @@ namespace CallingConv { /// which have an "optimized" convention to preserve registers. AVR_BUILTIN = 86, - /// Calling convention used for Mesa vertex shaders. + /// Calling convention used for Mesa vertex shaders, or AMDPAL last shader + /// stage before rasterization (vertex shader if tessellation and geometry + /// are not in use, or otherwise copy shader if one is needed). AMDGPU_VS = 87, - /// Calling convention used for Mesa geometry shaders. + /// Calling convention used for Mesa/AMDPAL geometry shaders. AMDGPU_GS = 88, - /// Calling convention used for Mesa pixel shaders. + /// Calling convention used for Mesa/AMDPAL pixel shaders. AMDGPU_PS = 89, - /// Calling convention used for Mesa compute shaders. + /// Calling convention used for Mesa/AMDPAL compute shaders. AMDGPU_CS = 90, /// Calling convention for AMDGPU code object kernels. @@ -201,14 +203,23 @@ namespace CallingConv { /// Register calling convention used for parameters transfer optimization X86_RegCall = 92, - /// Calling convention used for Mesa hull shaders. (= tessellation control - /// shaders) + /// Calling convention used for Mesa/AMDPAL hull shaders (= tessellation + /// control shaders). AMDGPU_HS = 93, /// Calling convention used for special MSP430 rtlib functions /// which have an "optimized" convention using additional registers. MSP430_BUILTIN = 94, + /// Calling convention used for AMDPAL vertex shader if tessellation is in + /// use. + AMDGPU_LS = 95, + + /// Calling convention used for AMDPAL shader stage before geometry shader + /// if geometry is in use. So either the domain (= tessellation evaluation) + /// shader if tessellation is in use, or otherwise the vertex shader. + AMDGPU_ES = 96, + /// The highest possible calling convention ID. Must be some 2^k - 1. MaxID = 1023 }; |