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author | David L. Jones <dlj@google.com> | 2017-11-15 01:40:05 +0000 |
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committer | David L. Jones <dlj@google.com> | 2017-11-15 01:40:05 +0000 |
commit | d5c2cca72463233df77a065f201db31b140eb44d (patch) | |
tree | 3f9a978131033302a58b7db7db1ecf2a4622bad2 /docs/CommandGuide/lli.rst | |
parent | ce7676b8db6bac096dad4c4ad62e9e6bb8aa1064 (diff) | |
parent | dcf64df89bc6d775e266ebd6b0134d135f47a35b (diff) |
Creating branches/google/testing and tags/google/testing/2017-11-14 from r317716testing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/google/testing@318248 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'docs/CommandGuide/lli.rst')
-rw-r--r-- | docs/CommandGuide/lli.rst | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/docs/CommandGuide/lli.rst b/docs/CommandGuide/lli.rst index 9da13ee47e0..58481073d06 100644 --- a/docs/CommandGuide/lli.rst +++ b/docs/CommandGuide/lli.rst @@ -122,7 +122,7 @@ CODE GENERATION OPTIONS Choose the code model from: - .. code-block:: perl + .. code-block:: text default: Target default code model small: Small code model @@ -154,7 +154,7 @@ CODE GENERATION OPTIONS Instruction schedulers available (before register allocation): - .. code-block:: perl + .. code-block:: text =default: Best scheduler for the target =none: No scheduling: breadth first sequencing @@ -168,7 +168,7 @@ CODE GENERATION OPTIONS Register allocator to use (default=linearscan) - .. code-block:: perl + .. code-block:: text =bigblock: Big-block register allocator =linearscan: linear scan register allocator =local - local register allocator @@ -178,7 +178,7 @@ CODE GENERATION OPTIONS Choose relocation model from: - .. code-block:: perl + .. code-block:: text =default: Target default relocation model =static: Non-relocatable code =pic - Fully relocatable, position independent code @@ -188,7 +188,7 @@ CODE GENERATION OPTIONS Spiller to use (default=local) - .. code-block:: perl + .. code-block:: text =simple: simple spiller =local: local spiller @@ -197,7 +197,7 @@ CODE GENERATION OPTIONS Choose style of code to emit from X86 backend: - .. code-block:: perl + .. code-block:: text =att: Emit AT&T-style assembly =intel: Emit Intel-style assembly |