aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorIgor Breger <igor.breger@intel.com>2017-07-10 09:26:09 +0000
committerIgor Breger <igor.breger@intel.com>2017-07-10 09:26:09 +0000
commit8c3ce14ba82f190172164b6ba0ad0e6d65e27873 (patch)
treeedc673b5a18e1abf18a28711add0ac5f162f8075
parent77954ced1a8f4d4dda2b2c9b7a618c360fd5b1df (diff)
[GlobalISel][X86] Support G_LOAD/G_STORE i1.
Summary: Support G_LOAD/G_STORE i1. Reviewers: zvi, guyblank Reviewed By: guyblank Subscribers: rovka, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D35178 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307527 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86LegalizerInfo.cpp2
-rw-r--r--test/CodeGen/X86/GlobalISel/legalize-memop-scalar.mir10
-rw-r--r--test/CodeGen/X86/GlobalISel/memop-scalar-x32.ll22
-rw-r--r--test/CodeGen/X86/GlobalISel/memop-scalar.ll20
4 files changed, 54 insertions, 0 deletions
diff --git a/lib/Target/X86/X86LegalizerInfo.cpp b/lib/Target/X86/X86LegalizerInfo.cpp
index ea3c3b99e06..744ba21011a 100644
--- a/lib/Target/X86/X86LegalizerInfo.cpp
+++ b/lib/Target/X86/X86LegalizerInfo.cpp
@@ -69,6 +69,7 @@ void X86LegalizerInfo::setLegalizerInfo32bit() {
for (auto Ty : {s8, s16, s32, p0})
setAction({MemOp, Ty}, Legal);
+ setAction({MemOp, s1}, WidenScalar);
// And everything's fine in addrspace 0.
setAction({MemOp, 1, p0}, Legal);
}
@@ -128,6 +129,7 @@ void X86LegalizerInfo::setLegalizerInfo64bit() {
for (auto Ty : {s8, s16, s32, s64, p0})
setAction({MemOp, Ty}, Legal);
+ setAction({MemOp, s1}, WidenScalar);
// And everything's fine in addrspace 0.
setAction({MemOp, 1, p0}, Legal);
}
diff --git a/test/CodeGen/X86/GlobalISel/legalize-memop-scalar.mir b/test/CodeGen/X86/GlobalISel/legalize-memop-scalar.mir
index 2ecb8685883..60d9fc63c14 100644
--- a/test/CodeGen/X86/GlobalISel/legalize-memop-scalar.mir
+++ b/test/CodeGen/X86/GlobalISel/legalize-memop-scalar.mir
@@ -26,11 +26,18 @@ registers:
- { id: 6, class: _, preferred-register: '' }
- { id: 7, class: _, preferred-register: '' }
- { id: 8, class: _, preferred-register: '' }
+ - { id: 9, class: _, preferred-register: '' }
+ - { id: 10, class: _, preferred-register: '' }
# ALL: %0(p0) = IMPLICIT_DEF
+# ALL-NEXT: %11(s8) = G_LOAD %0(p0) :: (load 1)
+# ALL-NEXT: %9(s1) = G_TRUNC %11(s8)
# ALL-NEXT: %1(s8) = G_LOAD %0(p0) :: (load 1)
# ALL-NEXT: %2(s16) = G_LOAD %0(p0) :: (load 2)
# ALL-NEXT: %3(s32) = G_LOAD %0(p0) :: (load 4)
# ALL-NEXT: %4(p0) = G_LOAD %0(p0) :: (load 8)
+# ALL-NEXT: %10(s1) = IMPLICIT_DEF
+# ALL-NEXT: %12(s8) = G_ZEXT %10(s1)
+# ALL-NEXT: G_STORE %12(s8), %0(p0) :: (store 1)
# ALL-NEXT: %5(s8) = IMPLICIT_DEF
# ALL-NEXT: G_STORE %5(s8), %0(p0) :: (store 1)
# ALL-NEXT: %6(s16) = IMPLICIT_DEF
@@ -44,11 +51,14 @@ body: |
liveins: %rdi
%0(p0) = IMPLICIT_DEF
+ %9(s1) = G_LOAD %0(p0) :: (load 1)
%1(s8) = G_LOAD %0(p0) :: (load 1)
%2(s16) = G_LOAD %0(p0) :: (load 2)
%3(s32) = G_LOAD %0(p0) :: (load 4)
%4(p0) = G_LOAD %0(p0) :: (load 8)
+ %10(s1) = IMPLICIT_DEF
+ G_STORE %10, %0 :: (store 1)
%5(s8) = IMPLICIT_DEF
G_STORE %5, %0 :: (store 1)
%6(s16) = IMPLICIT_DEF
diff --git a/test/CodeGen/X86/GlobalISel/memop-scalar-x32.ll b/test/CodeGen/X86/GlobalISel/memop-scalar-x32.ll
index 2757e649325..1c719b1bf74 100644
--- a/test/CodeGen/X86/GlobalISel/memop-scalar-x32.ll
+++ b/test/CodeGen/X86/GlobalISel/memop-scalar-x32.ll
@@ -4,6 +4,16 @@
;TODO merge with x86-64 tests (many operations not suppored yet)
+define i1 @test_load_i1(i1 * %p1) {
+; ALL-LABEL: test_load_i1:
+; ALL: # BB#0:
+; ALL-NEXT: movl 4(%esp), %eax
+; ALL-NEXT: movb (%eax), %al
+; ALL-NEXT: retl
+ %r = load i1, i1* %p1
+ ret i1 %r
+}
+
define i8 @test_load_i8(i8 * %p1) {
; ALL-LABEL: test_load_i8:
; ALL: # BB#0:
@@ -34,6 +44,18 @@ define i32 @test_load_i32(i32 * %p1) {
ret i32 %r
}
+define i1 * @test_store_i1(i1 %val, i1 * %p1) {
+; ALL-LABEL: test_store_i1:
+; ALL: # BB#0:
+; ALL-NEXT: movb 4(%esp), %cl
+; ALL-NEXT: movl 8(%esp), %eax
+; ALL-NEXT: andb $1, %cl
+; ALL-NEXT: movb %cl, (%eax)
+; ALL-NEXT: retl
+ store i1 %val, i1* %p1
+ ret i1 * %p1;
+}
+
define i8 * @test_store_i8(i8 %val, i8 * %p1) {
; ALL-LABEL: test_store_i8:
; ALL: # BB#0:
diff --git a/test/CodeGen/X86/GlobalISel/memop-scalar.ll b/test/CodeGen/X86/GlobalISel/memop-scalar.ll
index 2e04b3cf20b..2097a3b0bfc 100644
--- a/test/CodeGen/X86/GlobalISel/memop-scalar.ll
+++ b/test/CodeGen/X86/GlobalISel/memop-scalar.ll
@@ -2,6 +2,15 @@
; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=SSE_FAST
; RUN: llc -mtriple=x86_64-linux-gnu -regbankselect-greedy -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=SSE_GREEDY
+define i1 @test_load_i1(i1 * %p1) {
+; ALL-LABEL: test_load_i1:
+; ALL: # BB#0:
+; ALL-NEXT: movb (%rdi), %al
+; ALL-NEXT: retq
+ %r = load i1, i1* %p1
+ ret i1 %r
+}
+
define i8 @test_load_i8(i8 * %p1) {
; ALL-LABEL: test_load_i8:
; ALL: # BB#0:
@@ -70,6 +79,17 @@ define double @test_load_double(double * %p1) {
ret double %r
}
+define i1 * @test_store_i1(i1 %val, i1 * %p1) {
+; ALL-LABEL: test_store_i1:
+; ALL: # BB#0:
+; ALL-NEXT: andb $1, %dil
+; ALL-NEXT: movb %dil, (%rsi)
+; ALL-NEXT: movq %rsi, %rax
+; ALL-NEXT: retq
+ store i1 %val, i1* %p1
+ ret i1 * %p1;
+}
+
define i32 * @test_store_i32(i32 %val, i32 * %p1) {
; ALL-LABEL: test_store_i32:
; ALL: # BB#0: