Merge Linux and FreeBSD arm64 register contexts

Summary:
This is a test-the-water change about possibilities of reducing duplication in
the register context definitions.

I've named the new class RegisterInfoPOSIX, as RegisterContextPOSIX was already
taken :(.  The two files were identical except for a fix by Tamas in D12636,
which was applied to the Linux version only, which fixed a discrepancy between
the definitions of fpsr and fpcr on one hand, and all other floating point
register definitions on the other.

Linux test suite still passes after this change. For freebsd, make the floating
point register behavior consistent, but I don't know whether it will be
consistently fixed, or consistently broken. By eyeballing the code, I have a
feeling that a similar fix to D12636 will be required in
RegisterContextPOSIXProcessMonitor_arm64::ReadRegister, but I can't be sure as I
have no way to test it (the assert in that function should fire upon accessing
the registers if it is wrong though).

Reviewers: emaste, clayborg

Subscribers: aemerson, rengolin, beanz, mgorny, modocache, dmikulin, lldb-commits

Differential Revision: https://reviews.llvm.org/D25947

git-svn-id: https://llvm.org/svn/llvm-project/lldb/trunk@287916 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 99 insertions, 0 deletions

diff --git a/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp b/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
new file mode 100644
index 000000000..1b145e0a1
--- /dev/null
+++ b/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
@@ -0,0 +1,99 @@
+//===-- RegisterInfoPOSIX_arm64.cpp ----------------------------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===---------------------------------------------------------------------===//
+
+#include <cassert>
+#include <stddef.h>
+#include <vector>
+
+#include "lldb/lldb-defines.h"
+#include "llvm/Support/Compiler.h"
+
+#include "RegisterInfoPOSIX_arm64.h"
+
+// Based on RegisterContextDarwin_arm64.cpp
+#define GPR_OFFSET(idx) ((idx)*8)
+#define GPR_OFFSET_NAME(reg)                                                   \
+  (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm64::GPR, reg))
+
+#define FPU_OFFSET(idx) ((idx)*16 + sizeof(RegisterInfoPOSIX_arm64::GPR))
+#define FPU_OFFSET_NAME(reg)                                                   \
+  (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm64::FPU, reg) +                \
+   sizeof(RegisterInfoPOSIX_arm64::GPR))
+
+#define EXC_OFFSET_NAME(reg)                                                   \
+  (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm64::EXC, reg) +                \
+   sizeof(RegisterInfoPOSIX_arm64::GPR) +                                      \
+   sizeof(RegisterInfoPOSIX_arm64::FPU))
+#define DBG_OFFSET_NAME(reg)                                                   \
+  (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm64::DBG, reg) +                \
+   sizeof(RegisterInfoPOSIX_arm64::GPR) +                                      \
+   sizeof(RegisterInfoPOSIX_arm64::FPU) +                                      \
+   sizeof(RegisterInfoPOSIX_arm64::EXC))
+
+#define DEFINE_DBG(reg, i)                                                     \
+  #reg, NULL,                                                                  \
+      sizeof(((RegisterInfoPOSIX_arm64::DBG *) NULL)->reg[i]),                 \
+              DBG_OFFSET_NAME(reg[i]), lldb::eEncodingUint, lldb::eFormatHex,  \
+                              {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,       \
+                               LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,       \
+                               dbg_##reg##i },                                 \
+                               NULL, NULL, NULL, 0
+#define REG_CONTEXT_SIZE                                                       \
+  (sizeof(RegisterInfoPOSIX_arm64::GPR) +                                      \
+   sizeof(RegisterInfoPOSIX_arm64::FPU) +                                      \
+   sizeof(RegisterInfoPOSIX_arm64::EXC))
+
+//-----------------------------------------------------------------------------
+// Include RegisterInfos_arm64 to declare our g_register_infos_arm64 structure.
+//-----------------------------------------------------------------------------
+#define DECLARE_REGISTER_INFOS_ARM64_STRUCT
+#include "RegisterInfos_arm64.h"
+#undef DECLARE_REGISTER_INFOS_ARM64_STRUCT
+
+static const lldb_private::RegisterInfo *
+GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::aarch64:
+    return g_register_infos_arm64_le;
+  default:
+    assert(false && "Unhandled target architecture.");
+    return NULL;
+  }
+}
+
+static uint32_t
+GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::aarch64:
+    return static_cast<uint32_t>(sizeof(g_register_infos_arm64_le) /
+                                 sizeof(g_register_infos_arm64_le[0]));
+  default:
+    assert(false && "Unhandled target architecture.");
+    return 0;
+  }
+}
+
+RegisterInfoPOSIX_arm64::RegisterInfoPOSIX_arm64(
+    const lldb_private::ArchSpec &target_arch)
+    : lldb_private::RegisterInfoInterface(target_arch),
+      m_register_info_p(GetRegisterInfoPtr(target_arch)),
+      m_register_info_count(GetRegisterInfoCount(target_arch)) {}
+
+size_t RegisterInfoPOSIX_arm64::GetGPRSize() const {
+  return sizeof(struct RegisterInfoPOSIX_arm64::GPR);
+}
+
+const lldb_private::RegisterInfo *
+RegisterInfoPOSIX_arm64::GetRegisterInfo() const {
+  return m_register_info_p;
+}
+
+uint32_t RegisterInfoPOSIX_arm64::GetRegisterCount() const {
+  return m_register_info_count;
+}