diff options
| author | Erich Keane <erich.keane@intel.com> | 2019-03-21 13:30:56 +0000 |
|---|---|---|
| committer | Erich Keane <erich.keane@intel.com> | 2019-03-21 13:30:56 +0000 |
| commit | f3fae3fc58401b1955106ac46249e9aff2749ab2 (patch) | |
| tree | ad58652c37899261f075b381df75062fdeb7cd1d /test/CodeGen | |
| parent | e2755ead71aa45e2b4e65be9213db0a1fcea62fb (diff) | |
Permit redeclarations of a builtin to specify calling convention.
After https://reviews.llvm.org/rL355317 we noticed that quite a decent
amount of code redeclares builtins (memcpy in particular, I believe
reduced from an MSVC header) with a calling convention specified.
This gets particularly troublesome when the user specifies a new
'default' calling convention on the command line.
When looking to add a diagnostic for this case, it was noticed that we
had 3 other diagnostics that differed only slightly. This patch ALSO
unifies those under a 'select'. Unfortunately, the order of words in
ONE of these diagnostics was reversed ("'thiscall' calling convention"
vs "calling convention 'thiscall'"), so this patch also standardizes on
the former.
Differential Revision: https://reviews.llvm.org/D59560
Change-Id: I79f99fe7c2301640755ffdd774b46eb44526bb22
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@356663 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/aarch64-vpcs.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/test/CodeGen/aarch64-vpcs.c b/test/CodeGen/aarch64-vpcs.c index 0fc2e96511..a9edb7490c 100644 --- a/test/CodeGen/aarch64-vpcs.c +++ b/test/CodeGen/aarch64-vpcs.c @@ -2,7 +2,7 @@ // RUN: %clang_cc1 -triple aarch64-linux-gnu -emit-llvm -x c++ -o - %s | FileCheck %s -check-prefix=CHECKCXX // RUN: %clang_cc1 -triple i686-pc-linux-gnu -verify %s -void __attribute__((aarch64_vector_pcs)) f(int *); // expected-warning {{calling convention 'aarch64_vector_pcs' ignored for this target}} +void __attribute__((aarch64_vector_pcs)) f(int *); // expected-warning {{'aarch64_vector_pcs' calling convention ignored for this target}} // CHECKC: define void @g( // CHECKCXX: define void @_Z1gPi( @@ -16,7 +16,7 @@ void g(int *a) { // CHECKC: declare aarch64_vector_pcs void @f( // CHECKCXX: declare aarch64_vector_pcs void @_Z1fPi -void __attribute__((aarch64_vector_pcs)) h(int *a){ // expected-warning {{calling convention 'aarch64_vector_pcs' ignored for this target}} +void __attribute__((aarch64_vector_pcs)) h(int *a){ // expected-warning {{'aarch64_vector_pcs' calling convention ignored for this target}} // CHECKC: define aarch64_vector_pcs void @h( // CHECKCXX: define aarch64_vector_pcs void @_Z1hPi( f(a); |