diff options
| author | Fathi Boudra <fathi.boudra@linaro.org> | 2013-04-20 10:19:30 +0300 |
|---|---|---|
| committer | Fathi Boudra <fathi.boudra@linaro.org> | 2013-04-20 10:19:30 +0300 |
| commit | 60ea5c770707cf8e5be160aef2bb2f1e707e1926 (patch) | |
| tree | ce2dc3fb377cd4c59b485a8a7c1d1660c63a2edb /ArmPlatformPkg/ArmVExpressPkg/Library | |
| parent | 0016e32cf6e4fe0dfb0885f3394df70be2f63bb2 (diff) | |
Imported Upstream version 0.1+git15+20130418+09259caupstream/0.1+git15+20130418+09259caupstream
Diffstat (limited to 'ArmPlatformPkg/ArmVExpressPkg/Library')
14 files changed, 947 insertions, 952 deletions
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7.c index c650a6e3..87f41c7a 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7.c +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7.c @@ -121,7 +121,11 @@ ArmPlatformGetBootMode ( VOID
)
{
- return BOOT_WITH_FULL_CONFIGURATION;
+ if (MmioRead32(ARM_CTA15A7_SCC_SYSINFO) & ARM_CTA15A7_SCC_SYSINFO_UEFI_RESTORE_DEFAULT_NORFLASH) {
+ return BOOT_WITH_DEFAULT_SETTINGS;
+ } else {
+ return BOOT_WITH_FULL_CONFIGURATION;
+ }
}
/**
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf index f20db58d..a255c40b 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf @@ -1,55 +1,55 @@ -#/* @file -# Copyright (c) 2011-2012, ARM Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#*/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = CTA9x4ArmVExpressLib - FILE_GUID = b16c63a0-f417-11df-b3af-0002a5d5c51b - MODULE_TYPE = BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = ArmPlatformLib - -[Packages] - MdePkg/MdePkg.dec - MdeModulePkg/MdeModulePkg.dec - EmbeddedPkg/EmbeddedPkg.dec - ArmPkg/ArmPkg.dec - ArmPlatformPkg/ArmPlatformPkg.dec - -[LibraryClasses] - IoLib - ArmLib - ArmTrustZoneLib - MemoryAllocationLib - PL341DmcLib - PL301AxiLib - L2X0CacheLib - SerialPortLib - -[Sources.common] - CTA9x4.c - CTA9x4Mem.c - -[FeaturePcd] - gEmbeddedTokenSpaceGuid.PcdCacheEnable - gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping - -[FixedPcd] - gArmTokenSpaceGuid.PcdTrustzoneSupport - gArmTokenSpaceGuid.PcdSystemMemoryBase - gArmTokenSpaceGuid.PcdSystemMemorySize - - gArmTokenSpaceGuid.PcdL2x0ControllerBase - - gArmTokenSpaceGuid.PcdArmPrimaryCoreMask - gArmTokenSpaceGuid.PcdArmPrimaryCore +#/* @file
+# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#*/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = CTA9x4ArmVExpressLib
+ FILE_GUID = b16c63a0-f417-11df-b3af-0002a5d5c51b
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmPlatformLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+ IoLib
+ ArmLib
+ ArmTrustZoneLib
+ MemoryAllocationLib
+ PL341DmcLib
+ PL301AxiLib
+ L2X0CacheLib
+ SerialPortLib
+
+[Sources.common]
+ CTA9x4.c
+ CTA9x4Mem.c
+
+[FeaturePcd]
+ gEmbeddedTokenSpaceGuid.PcdCacheEnable
+ gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
+
+[FixedPcd]
+ gArmTokenSpaceGuid.PcdTrustzoneSupport
+ gArmTokenSpaceGuid.PcdSystemMemoryBase
+ gArmTokenSpaceGuid.PcdSystemMemorySize
+
+ gArmTokenSpaceGuid.PcdL2x0ControllerBase
+
+ gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
+ gArmTokenSpaceGuid.PcdArmPrimaryCore
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c index 98604415..fb920aa4 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c @@ -1,222 +1,213 @@ -/** @file -* -* Copyright (c) 2011-2012, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#include <Library/IoLib.h> -#include <Library/ArmPlatformLib.h> -#include <Library/DebugLib.h> -#include <Library/PcdLib.h> -#include <Library/SerialPortLib.h> - -#include <Drivers/PL341Dmc.h> -#include <Drivers/PL301Axi.h> -#include <Drivers/SP804Timer.h> - -#include <Ppi/ArmMpCoreInfo.h> - -#include <ArmPlatform.h> - -#define SerialPrint(txt) SerialPortWrite ((UINT8*)(txt), AsciiStrLen(txt)+1); - -ARM_CORE_INFO mVersatileExpressMpCoreInfoCTA9x4[] = { - { - // Cluster 0, Core 0 - 0x0, 0x0, - - // MP Core MailBox Set/Get/Clear Addresses and Clear Value - (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, - (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, - (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, - (UINT64)0xFFFFFFFF - }, - { - // Cluster 0, Core 1 - 0x0, 0x1, - - // MP Core MailBox Set/Get/Clear Addresses and Clear Value - (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, - (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, - (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, - (UINT64)0xFFFFFFFF - }, - { - // Cluster 0, Core 2 - 0x0, 0x2, - - // MP Core MailBox Set/Get/Clear Addresses and Clear Value - (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, - (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, - (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, - (UINT64)0xFFFFFFFF - }, - { - // Cluster 0, Core 3 - 0x0, 0x3, - - // MP Core MailBox Set/Get/Clear Addresses and Clear Value - (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, - (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, - (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, - (UINT64)0xFFFFFFFF - } -}; - -// DDR2 timings -PL341_DMC_CONFIG DDRTimings = { - .MaxChip = 1, - .IsUserCfg = TRUE, - .User0Cfg = 0x7C924924, - .User2Cfg = (TC_UIOLHXC_VALUE << TC_UIOLHNC_SHIFT) | (TC_UIOLHXC_VALUE << TC_UIOLHPC_SHIFT) | (0x1 << TC_UIOHOCT_SHIFT) | (0x1 << TC_UIOHSTOP_SHIFT), - .HasQos = TRUE, - .RefreshPeriod = 0x3D0, - .CasLatency = 0x8, - .WriteLatency = 0x3, - .t_mrd = 0x2, - .t_ras = 0xA, - .t_rc = 0xE, - .t_rcd = 0x104, - .t_rfc = 0x2f32, - .t_rp = 0x14, - .t_rrd = 0x2, - .t_wr = 0x4, - .t_wtr = 0x2, - .t_xp = 0x2, - .t_xsr = 0xC8, - .t_esr = 0x14, - .MemoryCfg = DMC_MEMORY_CONFIG_ACTIVE_CHIP_1 | DMC_MEMORY_CONFIG_BURST_4 | - DMC_MEMORY_CONFIG_ROW_ADDRESS_15 | DMC_MEMORY_CONFIG_COLUMN_ADDRESS_10, - .MemoryCfg2 = DMC_MEMORY_CFG2_DQM_INIT | DMC_MEMORY_CFG2_CKE_INIT | - DMC_MEMORY_CFG2_BANK_BITS_3 | DMC_MEMORY_CFG2_MEM_WIDTH_32, - .MemoryCfg3 = 0x00000001, - .ChipCfg0 = 0x00010000, - .t_faw = 0x00000A0D, - .ModeReg = DDR2_MR_BURST_LENGTH_4 | DDR2_MR_CAS_LATENCY_4 | DDR2_MR_WR_CYCLES_4, - .ExtModeReg = DDR_EMR_RTT_50R | (DDR_EMR_ODS_VAL << DDR_EMR_ODS_MASK), -}; - -/** - Return the current Boot Mode - - This function returns the boot reason on the platform - - @return Return the current Boot Mode of the platform - -**/ -EFI_BOOT_MODE -ArmPlatformGetBootMode ( - VOID - ) -{ - if (MmioRead32(ARM_VE_SYS_FLAGS_NV_REG) == 0) { - return BOOT_WITH_FULL_CONFIGURATION; - } else { - return BOOT_ON_S2_RESUME; - } -} - -/** - Initialize controllers that must setup in the normal world - - This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei - in the PEI phase. - -**/ -RETURN_STATUS -ArmPlatformInitialize ( - IN UINTN MpId - ) -{ - if (!IS_PRIMARY_CORE(MpId)) { - return RETURN_SUCCESS; - } - - // Configure periodic timer (TIMER0) for 1MHz operation - MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK); - // Configure 1MHz clock - MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK); - // configure SP810 to use 1MHz clock and disable - MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK); - // Configure SP810 to use 1MHz clock and disable - MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK); - - return RETURN_SUCCESS; -} - -/** - Initialize the system (or sometimes called permanent) memory - - This memory is generally represented by the DRAM. - -**/ -VOID -ArmPlatformInitializeSystemMemory ( - VOID - ) -{ - UINT32 Value; - - // Memory Map remapping - if (FeaturePcdGet(PcdNorFlashRemapping)) { - SerialPrint ("Secure ROM at 0x0\n\r"); - } else { - Value = MmioRead32(ARM_VE_SYS_CFGRW1_REG); //Scc - CFGRW1 - // Remap the DRAM to 0x0 - MmioWrite32(ARM_VE_SYS_CFGRW1_REG, (Value & 0x0FFFFFFF) | ARM_VE_CFGRW1_REMAP_DRAM); - } - - PL341DmcInit(ARM_VE_DMC_BASE, &DDRTimings); - PL301AxiInit(ARM_VE_FAXI_BASE); -} - -EFI_STATUS -PrePeiCoreGetMpCoreInfo ( - OUT UINTN *CoreCount, - OUT ARM_CORE_INFO **ArmCoreTable - ) -{ - *CoreCount = sizeof(mVersatileExpressMpCoreInfoCTA9x4) / sizeof(ARM_CORE_INFO); - *ArmCoreTable = mVersatileExpressMpCoreInfoCTA9x4; - - return EFI_SUCCESS; -} - -// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore -EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID; -ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo }; - -EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = { - { - EFI_PEI_PPI_DESCRIPTOR_PPI, - &mArmMpCoreInfoPpiGuid, - &mMpCoreInfoPpi - } -}; - -VOID -ArmPlatformGetPlatformPpiList ( - OUT UINTN *PpiListSize, - OUT EFI_PEI_PPI_DESCRIPTOR **PpiList - ) -{ - *PpiListSize = sizeof(gPlatformPpiTable); - *PpiList = gPlatformPpiTable; -} - -UINTN -ArmPlatformGetCorePosition ( - IN UINTN MpId - ) -{ - return 1; -} - +/** @file
+*
+* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Library/IoLib.h>
+#include <Library/ArmPlatformLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+#include <Library/SerialPortLib.h>
+
+#include <Drivers/PL341Dmc.h>
+#include <Drivers/PL301Axi.h>
+#include <Drivers/SP804Timer.h>
+
+#include <Ppi/ArmMpCoreInfo.h>
+
+#include <ArmPlatform.h>
+
+#define SerialPrint(txt) SerialPortWrite ((UINT8*)(txt), AsciiStrLen(txt)+1);
+
+ARM_CORE_INFO mVersatileExpressMpCoreInfoCTA9x4[] = {
+ {
+ // Cluster 0, Core 0
+ 0x0, 0x0,
+
+ // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+ (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
+ (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
+ (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
+ (UINT64)0xFFFFFFFF
+ },
+ {
+ // Cluster 0, Core 1
+ 0x0, 0x1,
+
+ // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+ (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
+ (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
+ (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
+ (UINT64)0xFFFFFFFF
+ },
+ {
+ // Cluster 0, Core 2
+ 0x0, 0x2,
+
+ // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+ (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
+ (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
+ (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
+ (UINT64)0xFFFFFFFF
+ },
+ {
+ // Cluster 0, Core 3
+ 0x0, 0x3,
+
+ // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+ (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
+ (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
+ (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
+ (UINT64)0xFFFFFFFF
+ }
+};
+
+// DDR2 timings
+PL341_DMC_CONFIG DDRTimings = {
+ .MaxChip = 1,
+ .IsUserCfg = TRUE,
+ .User0Cfg = 0x7C924924,
+ .User2Cfg = (TC_UIOLHXC_VALUE << TC_UIOLHNC_SHIFT) | (TC_UIOLHXC_VALUE << TC_UIOLHPC_SHIFT) | (0x1 << TC_UIOHOCT_SHIFT) | (0x1 << TC_UIOHSTOP_SHIFT),
+ .HasQos = TRUE,
+ .RefreshPeriod = 0x3D0,
+ .CasLatency = 0x8,
+ .WriteLatency = 0x3,
+ .t_mrd = 0x2,
+ .t_ras = 0xA,
+ .t_rc = 0xE,
+ .t_rcd = 0x104,
+ .t_rfc = 0x2f32,
+ .t_rp = 0x14,
+ .t_rrd = 0x2,
+ .t_wr = 0x4,
+ .t_wtr = 0x2,
+ .t_xp = 0x2,
+ .t_xsr = 0xC8,
+ .t_esr = 0x14,
+ .MemoryCfg = DMC_MEMORY_CONFIG_ACTIVE_CHIP_1 | DMC_MEMORY_CONFIG_BURST_4 |
+ DMC_MEMORY_CONFIG_ROW_ADDRESS_15 | DMC_MEMORY_CONFIG_COLUMN_ADDRESS_10,
+ .MemoryCfg2 = DMC_MEMORY_CFG2_DQM_INIT | DMC_MEMORY_CFG2_CKE_INIT |
+ DMC_MEMORY_CFG2_BANK_BITS_3 | DMC_MEMORY_CFG2_MEM_WIDTH_32,
+ .MemoryCfg3 = 0x00000001,
+ .ChipCfg0 = 0x00010000,
+ .t_faw = 0x00000A0D,
+ .ModeReg = DDR2_MR_BURST_LENGTH_4 | DDR2_MR_CAS_LATENCY_4 | DDR2_MR_WR_CYCLES_4,
+ .ExtModeReg = DDR_EMR_RTT_50R | (DDR_EMR_ODS_VAL << DDR_EMR_ODS_MASK),
+};
+
+/**
+ Return the current Boot Mode
+
+ This function returns the boot reason on the platform
+
+ @return Return the current Boot Mode of the platform
+
+**/
+EFI_BOOT_MODE
+ArmPlatformGetBootMode (
+ VOID
+ )
+{
+ if (MmioRead32(ARM_VE_SYS_FLAGS_NV_REG) == 0) {
+ return BOOT_WITH_FULL_CONFIGURATION;
+ } else {
+ return BOOT_ON_S2_RESUME;
+ }
+}
+
+/**
+ Initialize controllers that must setup in the normal world
+
+ This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei
+ in the PEI phase.
+
+**/
+RETURN_STATUS
+ArmPlatformInitialize (
+ IN UINTN MpId
+ )
+{
+ if (!IS_PRIMARY_CORE(MpId)) {
+ return RETURN_SUCCESS;
+ }
+
+ // Configure periodic timer (TIMER0) for 1MHz operation
+ MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);
+ // Configure 1MHz clock
+ MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);
+ // configure SP810 to use 1MHz clock and disable
+ MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
+ // Configure SP810 to use 1MHz clock and disable
+ MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
+
+ return RETURN_SUCCESS;
+}
+
+/**
+ Initialize the system (or sometimes called permanent) memory
+
+ This memory is generally represented by the DRAM.
+
+**/
+VOID
+ArmPlatformInitializeSystemMemory (
+ VOID
+ )
+{
+ UINT32 Value;
+
+ // Memory Map remapping
+ if (FeaturePcdGet(PcdNorFlashRemapping)) {
+ SerialPrint ("Secure ROM at 0x0\n\r");
+ } else {
+ Value = MmioRead32(ARM_VE_SYS_CFGRW1_REG); //Scc - CFGRW1
+ // Remap the DRAM to 0x0
+ MmioWrite32(ARM_VE_SYS_CFGRW1_REG, (Value & 0x0FFFFFFF) | ARM_VE_CFGRW1_REMAP_DRAM);
+ }
+
+ PL341DmcInit(ARM_VE_DMC_BASE, &DDRTimings);
+ PL301AxiInit(ARM_VE_FAXI_BASE);
+}
+
+EFI_STATUS
+PrePeiCoreGetMpCoreInfo (
+ OUT UINTN *CoreCount,
+ OUT ARM_CORE_INFO **ArmCoreTable
+ )
+{
+ *CoreCount = sizeof(mVersatileExpressMpCoreInfoCTA9x4) / sizeof(ARM_CORE_INFO);
+ *ArmCoreTable = mVersatileExpressMpCoreInfoCTA9x4;
+
+ return EFI_SUCCESS;
+}
+
+// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore
+EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
+ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
+
+EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
+ {
+ EFI_PEI_PPI_DESCRIPTOR_PPI,
+ &mArmMpCoreInfoPpiGuid,
+ &mMpCoreInfoPpi
+ }
+};
+
+VOID
+ArmPlatformGetPlatformPpiList (
+ OUT UINTN *PpiListSize,
+ OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
+ )
+{
+ *PpiListSize = sizeof(gPlatformPpiTable);
+ *PpiList = gPlatformPpiTable;
+}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c index 69ffd45f..f055608a 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c @@ -1,163 +1,163 @@ -/** @file -* -* Copyright (c) 2011-2012, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#include <Library/IoLib.h> -#include <Library/ArmPlatformLib.h> -#include <Library/DebugLib.h> -#include <Library/PcdLib.h> - -#include <Ppi/ArmMpCoreInfo.h> - -#include <ArmPlatform.h> - -UINTN -ArmGetCpuCountPerCluster ( - VOID - ); - -ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = { - { - // Cluster 0, Core 0 - 0x0, 0x0, - - // MP Core MailBox Set/Get/Clear Addresses and Clear Value - (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, - (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, - (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, - (UINT64)0xFFFFFFFF - }, - { - // Cluster 0, Core 1 - 0x0, 0x1, - - // MP Core MailBox Set/Get/Clear Addresses and Clear Value - (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, - (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, - (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, - (UINT64)0xFFFFFFFF - }, - { - // Cluster 0, Core 2 - 0x0, 0x2, - - // MP Core MailBox Set/Get/Clear Addresses and Clear Value - (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, - (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, - (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, - (UINT64)0xFFFFFFFF - }, - { - // Cluster 0, Core 3 - 0x0, 0x3, - - // MP Core MailBox Set/Get/Clear Addresses and Clear Value - (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG, - (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG, - (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG, - (UINT64)0xFFFFFFFF - } -}; - -/** - Return the current Boot Mode - - This function returns the boot reason on the platform - - @return Return the current Boot Mode of the platform - -**/ -EFI_BOOT_MODE -ArmPlatformGetBootMode ( - VOID - ) -{ - return BOOT_WITH_FULL_CONFIGURATION; -} - -/** - Initialize controllers that must setup in the normal world - - This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim - in the PEI phase. - -**/ -RETURN_STATUS -ArmPlatformInitialize ( - IN UINTN MpId - ) -{ - if (!IS_PRIMARY_CORE(MpId)) { - return RETURN_SUCCESS; - } - - // Disable memory remapping and return to normal mapping - MmioOr32 (SP810_CTRL_BASE, BIT8); - - return RETURN_SUCCESS; -} - -/** - Initialize the system (or sometimes called permanent) memory - - This memory is generally represented by the DRAM. - -**/ -VOID -ArmPlatformInitializeSystemMemory ( - VOID - ) -{ - // Nothing to do here -} - -EFI_STATUS -PrePeiCoreGetMpCoreInfo ( - OUT UINTN *CoreCount, - OUT ARM_CORE_INFO **ArmCoreTable - ) -{ - UINT32 ProcType; - - ProcType = MmioRead32 (ARM_VE_SYS_PROCID0_REG) & ARM_VE_SYS_PROC_ID_MASK; - if ((ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A9) || (ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A15)) { - // Only support one cluster - *CoreCount = ArmGetCpuCountPerCluster (); - *ArmCoreTable = mVersatileExpressMpCoreInfoTable; - return EFI_SUCCESS; - } else { - return EFI_UNSUPPORTED; - } -} - -// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore -EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID; -ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo }; - -EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = { - { - EFI_PEI_PPI_DESCRIPTOR_PPI, - &mArmMpCoreInfoPpiGuid, - &mMpCoreInfoPpi - } -}; - -VOID -ArmPlatformGetPlatformPpiList ( - OUT UINTN *PpiListSize, - OUT EFI_PEI_PPI_DESCRIPTOR **PpiList - ) -{ - *PpiListSize = sizeof(gPlatformPpiTable); - *PpiList = gPlatformPpiTable; -} +/** @file
+*
+* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Library/IoLib.h>
+#include <Library/ArmPlatformLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+
+#include <Ppi/ArmMpCoreInfo.h>
+
+#include <ArmPlatform.h>
+
+UINTN
+ArmGetCpuCountPerCluster (
+ VOID
+ );
+
+ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = {
+ {
+ // Cluster 0, Core 0
+ 0x0, 0x0,
+
+ // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+ (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
+ (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
+ (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
+ (UINT64)0xFFFFFFFF
+ },
+ {
+ // Cluster 0, Core 1
+ 0x0, 0x1,
+
+ // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+ (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
+ (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
+ (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
+ (UINT64)0xFFFFFFFF
+ },
+ {
+ // Cluster 0, Core 2
+ 0x0, 0x2,
+
+ // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+ (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
+ (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
+ (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
+ (UINT64)0xFFFFFFFF
+ },
+ {
+ // Cluster 0, Core 3
+ 0x0, 0x3,
+
+ // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+ (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
+ (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
+ (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
+ (UINT64)0xFFFFFFFF
+ }
+};
+
+/**
+ Return the current Boot Mode
+
+ This function returns the boot reason on the platform
+
+ @return Return the current Boot Mode of the platform
+
+**/
+EFI_BOOT_MODE
+ArmPlatformGetBootMode (
+ VOID
+ )
+{
+ return BOOT_WITH_FULL_CONFIGURATION;
+}
+
+/**
+ Initialize controllers that must setup in the normal world
+
+ This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim
+ in the PEI phase.
+
+**/
+RETURN_STATUS
+ArmPlatformInitialize (
+ IN UINTN MpId
+ )
+{
+ if (!IS_PRIMARY_CORE(MpId)) {
+ return RETURN_SUCCESS;
+ }
+
+ // Disable memory remapping and return to normal mapping
+ MmioOr32 (SP810_CTRL_BASE, BIT8);
+
+ return RETURN_SUCCESS;
+}
+
+/**
+ Initialize the system (or sometimes called permanent) memory
+
+ This memory is generally represented by the DRAM.
+
+**/
+VOID
+ArmPlatformInitializeSystemMemory (
+ VOID
+ )
+{
+ // Nothing to do here
+}
+
+EFI_STATUS
+PrePeiCoreGetMpCoreInfo (
+ OUT UINTN *CoreCount,
+ OUT ARM_CORE_INFO **ArmCoreTable
+ )
+{
+ UINT32 ProcType;
+
+ ProcType = MmioRead32 (ARM_VE_SYS_PROCID0_REG) & ARM_VE_SYS_PROC_ID_MASK;
+ if ((ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A9) || (ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A15)) {
+ // Only support one cluster
+ *CoreCount = ArmGetCpuCountPerCluster ();
+ *ArmCoreTable = mVersatileExpressMpCoreInfoTable;
+ return EFI_SUCCESS;
+ } else {
+ return EFI_UNSUPPORTED;
+ }
+}
+
+// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore
+EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
+ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
+
+EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
+ {
+ EFI_PEI_PPI_DESCRIPTOR_PPI,
+ &mArmMpCoreInfoPpiGuid,
+ &mMpCoreInfoPpi
+ }
+};
+
+VOID
+ArmPlatformGetPlatformPpiList (
+ OUT UINTN *PpiListSize,
+ OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
+ )
+{
+ *PpiListSize = sizeof(gPlatformPpiTable);
+ *PpiList = gPlatformPpiTable;
+}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c index f3e8cafc..cb6376f6 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c @@ -103,7 +103,7 @@ ArmPlatformGetVirtualMemoryMap ( VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_PERIPH_BASE;
VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_PERIPH_BASE;
VirtualMemoryTable[Index].Length = 2 * ARM_VE_SMB_PERIPH_SZ;
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; + VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
//TODO:This should be enabled for final release. Right now, ARM VE RTSM crashes.
// // If a Logic Tile is connected to The ARM Versatile Express Motherboard
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c index ce9bc8b2..228a0fb0 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c @@ -1,148 +1,148 @@ -/** @file -* -* Copyright (c) 2011-2012, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#include <Library/ArmPlatformLib.h> -#include <Library/ArmPlatformSysConfigLib.h> -#include <Library/DebugLib.h> -#include <Library/IoLib.h> -#include <Library/PcdLib.h> - -#include <Drivers/ArmTrustzone.h> -#include <Drivers/PL310L2Cache.h> - -#include <ArmPlatform.h> - -/** - Initialize the Secure peripherals and memory regions - - If Trustzone is supported by your platform then this function makes the required initialization - of the secure peripherals and memory regions. - -**/ -VOID -ArmPlatformSecTrustzoneInit ( - IN UINTN MpId - ) -{ - // Nothing to do - if (!IS_PRIMARY_CORE(MpId)) { - return; - } - - // - // Setup TZ Protection Controller - // - - if (MmioRead32(ARM_VE_SYS_CFGRW1_REG) & ARM_VE_CFGRW1_TZASC_EN_BIT_MASK) { - ASSERT (PcdGetBool (PcdTrustzoneSupport) == TRUE); - } else { - ASSERT (PcdGetBool (PcdTrustzoneSupport) == FALSE); - } - - // Set Non Secure access for all devices - TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_0, 0xFFFFFFFF); - TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_1, 0xFFFFFFFF); - TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_2, 0xFFFFFFFF); - - // Remove Non secure access to secure devices - TZPCClearDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_0, - ARM_VE_DECPROT_BIT_TZPC | ARM_VE_DECPROT_BIT_DMC_TZASC | ARM_VE_DECPROT_BIT_NMC_TZASC | ARM_VE_DECPROT_BIT_SMC_TZASC); - - TZPCClearDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_2, - ARM_VE_DECPROT_BIT_EXT_MAST_TZ | ARM_VE_DECPROT_BIT_DMC_TZASC_LOCK | ARM_VE_DECPROT_BIT_NMC_TZASC_LOCK | ARM_VE_DECPROT_BIT_SMC_TZASC_LOCK); - - // - // Setup TZ Address Space Controller for the SMC. Create 5 Non Secure regions (NOR0, NOR1, SRAM, SMC Peripheral regions) - // - - // NOR Flash 0 non secure (BootMon) - TZASCSetRegion(ARM_VE_TZASC_BASE,1,TZASC_REGION_ENABLED, - ARM_VE_SMB_NOR0_BASE,0, - TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW); - - // NOR Flash 1. The first half of the NOR Flash1 must be secure for the secure firmware (sec_uefi.bin) - if (PcdGetBool (PcdTrustzoneSupport) == TRUE) { - //Note: Your OS Kernel must be aware of the secure regions before to enable this region - TZASCSetRegion(ARM_VE_TZASC_BASE,2,TZASC_REGION_ENABLED, - ARM_VE_SMB_NOR1_BASE + SIZE_32MB,0, - TZASC_REGION_SIZE_32MB, TZASC_REGION_SECURITY_NSRW); - } else { - TZASCSetRegion(ARM_VE_TZASC_BASE,2,TZASC_REGION_ENABLED, - ARM_VE_SMB_NOR1_BASE,0, - TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW); - } - - // Base of SRAM. Only half of SRAM in Non Secure world - // First half non secure (16MB) + Second Half secure (16MB) = 32MB of SRAM - if (PcdGetBool (PcdTrustzoneSupport) == TRUE) { - //Note: Your OS Kernel must be aware of the secure regions before to enable this region - TZASCSetRegion(ARM_VE_TZASC_BASE,3,TZASC_REGION_ENABLED, - ARM_VE_SMB_SRAM_BASE,0, - TZASC_REGION_SIZE_16MB, TZASC_REGION_SECURITY_NSRW); - } else { - TZASCSetRegion(ARM_VE_TZASC_BASE,3,TZASC_REGION_ENABLED, - ARM_VE_SMB_SRAM_BASE,0, - TZASC_REGION_SIZE_32MB, TZASC_REGION_SECURITY_NSRW); - } - - // Memory Mapped Peripherals. All in non secure world - TZASCSetRegion(ARM_VE_TZASC_BASE,4,TZASC_REGION_ENABLED, - ARM_VE_SMB_PERIPH_BASE,0, - TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW); - - // MotherBoard Peripherals and On-chip peripherals. - TZASCSetRegion(ARM_VE_TZASC_BASE,5,TZASC_REGION_ENABLED, - ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE,0, - TZASC_REGION_SIZE_256MB, TZASC_REGION_SECURITY_NSRW); -} - -/** - Initialize controllers that must setup at the early stage - - Some peripherals must be initialized in Secure World. - For example, some L2x0 requires to be initialized in Secure World - -**/ -RETURN_STATUS -ArmPlatformSecInitialize ( - IN UINTN MpId - ) -{ - // If it is not the primary core then there is nothing to do - if (!IS_PRIMARY_CORE(MpId)) { - return RETURN_SUCCESS; - } - - // The L2x0 controller must be intialize in Secure World - L2x0CacheInit(PcdGet32(PcdL2x0ControllerBase), - PL310_TAG_LATENCIES(L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES), - PL310_DATA_LATENCIES(L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES), - 0,~0, // Use default setting for the Auxiliary Control Register - FALSE); - - // Initialize the System Configuration - ArmPlatformSysConfigInitialize (); - - // If we skip the PEI Core we could want to initialize the DRAM in the SEC phase. - // If we are in standalone, we need the initialization to copy the UEFI firmware into DRAM - if ((FeaturePcdGet (PcdSystemMemoryInitializeInSec)) || (FeaturePcdGet (PcdStandalone) == FALSE)) { - // If it is not a standalone build ensure the PcdSystemMemoryInitializeInSec has been set - ASSERT(FeaturePcdGet (PcdSystemMemoryInitializeInSec) == TRUE); - - // Initialize system memory (DRAM) - ArmPlatformInitializeSystemMemory (); - } - - return RETURN_SUCCESS; -} +/** @file
+*
+* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Library/ArmPlatformLib.h>
+#include <Library/ArmPlatformSysConfigLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/PcdLib.h>
+
+#include <Drivers/ArmTrustzone.h>
+#include <Drivers/PL310L2Cache.h>
+
+#include <ArmPlatform.h>
+
+/**
+ Initialize the Secure peripherals and memory regions
+
+ If Trustzone is supported by your platform then this function makes the required initialization
+ of the secure peripherals and memory regions.
+
+**/
+VOID
+ArmPlatformSecTrustzoneInit (
+ IN UINTN MpId
+ )
+{
+ // Nothing to do
+ if (!IS_PRIMARY_CORE(MpId)) {
+ return;
+ }
+
+ //
+ // Setup TZ Protection Controller
+ //
+
+ if (MmioRead32(ARM_VE_SYS_CFGRW1_REG) & ARM_VE_CFGRW1_TZASC_EN_BIT_MASK) {
+ ASSERT (PcdGetBool (PcdTrustzoneSupport) == TRUE);
+ } else {
+ ASSERT (PcdGetBool (PcdTrustzoneSupport) == FALSE);
+ }
+
+ // Set Non Secure access for all devices
+ TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_0, 0xFFFFFFFF);
+ TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_1, 0xFFFFFFFF);
+ TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_2, 0xFFFFFFFF);
+
+ // Remove Non secure access to secure devices
+ TZPCClearDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_0,
+ ARM_VE_DECPROT_BIT_TZPC | ARM_VE_DECPROT_BIT_DMC_TZASC | ARM_VE_DECPROT_BIT_NMC_TZASC | ARM_VE_DECPROT_BIT_SMC_TZASC);
+
+ TZPCClearDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_2,
+ ARM_VE_DECPROT_BIT_EXT_MAST_TZ | ARM_VE_DECPROT_BIT_DMC_TZASC_LOCK | ARM_VE_DECPROT_BIT_NMC_TZASC_LOCK | ARM_VE_DECPROT_BIT_SMC_TZASC_LOCK);
+
+ //
+ // Setup TZ Address Space Controller for the SMC. Create 5 Non Secure regions (NOR0, NOR1, SRAM, SMC Peripheral regions)
+ //
+
+ // NOR Flash 0 non secure (BootMon)
+ TZASCSetRegion(ARM_VE_TZASC_BASE,1,TZASC_REGION_ENABLED,
+ ARM_VE_SMB_NOR0_BASE,0,
+ TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW);
+
+ // NOR Flash 1. The first half of the NOR Flash1 must be secure for the secure firmware (sec_uefi.bin)
+ if (PcdGetBool (PcdTrustzoneSupport) == TRUE) {
+ //Note: Your OS Kernel must be aware of the secure regions before to enable this region
+ TZASCSetRegion(ARM_VE_TZASC_BASE,2,TZASC_REGION_ENABLED,
+ ARM_VE_SMB_NOR1_BASE + SIZE_32MB,0,
+ TZASC_REGION_SIZE_32MB, TZASC_REGION_SECURITY_NSRW);
+ } else {
+ TZASCSetRegion(ARM_VE_TZASC_BASE,2,TZASC_REGION_ENABLED,
+ ARM_VE_SMB_NOR1_BASE,0,
+ TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW);
+ }
+
+ // Base of SRAM. Only half of SRAM in Non Secure world
+ // First half non secure (16MB) + Second Half secure (16MB) = 32MB of SRAM
+ if (PcdGetBool (PcdTrustzoneSupport) == TRUE) {
+ //Note: Your OS Kernel must be aware of the secure regions before to enable this region
+ TZASCSetRegion(ARM_VE_TZASC_BASE,3,TZASC_REGION_ENABLED,
+ ARM_VE_SMB_SRAM_BASE,0,
+ TZASC_REGION_SIZE_16MB, TZASC_REGION_SECURITY_NSRW);
+ } else {
+ TZASCSetRegion(ARM_VE_TZASC_BASE,3,TZASC_REGION_ENABLED,
+ ARM_VE_SMB_SRAM_BASE,0,
+ TZASC_REGION_SIZE_32MB, TZASC_REGION_SECURITY_NSRW);
+ }
+
+ // Memory Mapped Peripherals. All in non secure world
+ TZASCSetRegion(ARM_VE_TZASC_BASE,4,TZASC_REGION_ENABLED,
+ ARM_VE_SMB_PERIPH_BASE,0,
+ TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW);
+
+ // MotherBoard Peripherals and On-chip peripherals.
+ TZASCSetRegion(ARM_VE_TZASC_BASE,5,TZASC_REGION_ENABLED,
+ ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE,0,
+ TZASC_REGION_SIZE_256MB, TZASC_REGION_SECURITY_NSRW);
+}
+
+/**
+ Initialize controllers that must setup at the early stage
+
+ Some peripherals must be initialized in Secure World.
+ For example, some L2x0 requires to be initialized in Secure World
+
+**/
+RETURN_STATUS
+ArmPlatformSecInitialize (
+ IN UINTN MpId
+ )
+{
+ // If it is not the primary core then there is nothing to do
+ if (!IS_PRIMARY_CORE(MpId)) {
+ return RETURN_SUCCESS;
+ }
+
+ // The L2x0 controller must be intialize in Secure World
+ L2x0CacheInit(PcdGet32(PcdL2x0ControllerBase),
+ PL310_TAG_LATENCIES(L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES),
+ PL310_DATA_LATENCIES(L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES),
+ 0,~0, // Use default setting for the Auxiliary Control Register
+ FALSE);
+
+ // Initialize the System Configuration
+ ArmPlatformSysConfigInitialize ();
+
+ // If we skip the PEI Core we could want to initialize the DRAM in the SEC phase.
+ // If we are in standalone, we need the initialization to copy the UEFI firmware into DRAM
+ if ((FeaturePcdGet (PcdSystemMemoryInitializeInSec)) || (FeaturePcdGet (PcdStandalone) == FALSE)) {
+ // If it is not a standalone build ensure the PcdSystemMemoryInitializeInSec has been set
+ ASSERT(FeaturePcdGet (PcdSystemMemoryInitializeInSec) == TRUE);
+
+ // Initialize system memory (DRAM)
+ ArmPlatformInitializeSystemMemory ();
+ }
+
+ return RETURN_SUCCESS;
+}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf index 4a1e056a..ff847671 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf @@ -1,52 +1,52 @@ -#/* @file -# Copyright (c) 2011-2012, ARM Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#*/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = RTSMArmVExpressSecLib - FILE_GUID = 1fdaabb0-ab7d-480c-91ff-428dc1546f3a - MODULE_TYPE = BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = ArmPlatformSecLib - -[Packages] - MdePkg/MdePkg.dec - MdeModulePkg/MdeModulePkg.dec - EmbeddedPkg/EmbeddedPkg.dec - ArmPkg/ArmPkg.dec - ArmPlatformPkg/ArmPlatformPkg.dec - -[LibraryClasses] - IoLib - ArmLib - SerialPortLib - -[Sources.common] - RTSMSec.c - -[Sources.ARM] - Arm/RTSMBoot.asm | RVCT - Arm/RTSMBoot.S | GCC - Arm/RTSMHelper.asm | RVCT - Arm/RTSMHelper.S | GCC - -[FeaturePcd] - gEmbeddedTokenSpaceGuid.PcdCacheEnable - gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping - gArmPlatformTokenSpaceGuid.PcdStandalone - -[FixedPcd] - gArmTokenSpaceGuid.PcdFvBaseAddress - - gArmTokenSpaceGuid.PcdArmPrimaryCoreMask - gArmTokenSpaceGuid.PcdArmPrimaryCore +#/* @file
+# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#*/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = RTSMArmVExpressSecLib
+ FILE_GUID = 1fdaabb0-ab7d-480c-91ff-428dc1546f3a
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmPlatformSecLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+ IoLib
+ ArmLib
+ SerialPortLib
+
+[Sources.common]
+ RTSMSec.c
+
+[Sources.ARM]
+ Arm/RTSMBoot.asm | RVCT
+ Arm/RTSMBoot.S | GCC
+ Arm/RTSMHelper.asm | RVCT
+ Arm/RTSMHelper.S | GCC
+
+[FeaturePcd]
+ gEmbeddedTokenSpaceGuid.PcdCacheEnable
+ gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
+ gArmPlatformTokenSpaceGuid.PcdStandalone
+
+[FixedPcd]
+ gArmTokenSpaceGuid.PcdFvBaseAddress
+
+ gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
+ gArmTokenSpaceGuid.PcdArmPrimaryCore
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c index 4ae63016..92df56cd 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c @@ -1,83 +1,83 @@ -/** @file -* -* Copyright (c) 2011-2012, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#include <Library/IoLib.h> -#include <Library/ArmPlatformLib.h> -#include <Library/DebugLib.h> -#include <Library/PcdLib.h> - -#include <Drivers/PL310L2Cache.h> -#include <Drivers/SP804Timer.h> - -#include <ArmPlatform.h> - -/** - Initialize the Secure peripherals and memory regions - - If Trustzone is supported by your platform then this function makes the required initialization - of the secure peripherals and memory regions. - -**/ -VOID -ArmPlatformSecTrustzoneInit ( - IN UINTN MpId - ) -{ - // No TZPC or TZASC on RTSM to initialize -} - -/** - Initialize controllers that must setup at the early stage - - Some peripherals must be initialized in Secure World. - For example, some L2x0 requires to be initialized in Secure World - -**/ -RETURN_STATUS -ArmPlatformSecInitialize ( - IN UINTN MpId - ) -{ - // If it is not the primary core then there is nothing to do - if (!IS_PRIMARY_CORE(MpId)) { - return RETURN_SUCCESS; - } - - // Configure periodic timer (TIMER0) for 1MHz operation - MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK); - // Configure 1MHz clock - MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK); - // Configure SP810 to use 1MHz clock and disable - MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK); - // Configure SP810 to use 1MHz clock and disable - MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK); - - return RETURN_SUCCESS; -} - -/** - Call before jumping to Normal World - - This function allows the firmware platform to do extra actions before - jumping to the Normal World - -**/ -VOID -ArmPlatformSecExtraAction ( - IN UINTN MpId, - OUT UINTN* JumpAddress - ) -{ - *JumpAddress = PcdGet32(PcdFvBaseAddress); -} +/** @file
+*
+* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Library/IoLib.h>
+#include <Library/ArmPlatformLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+
+#include <Drivers/PL310L2Cache.h>
+#include <Drivers/SP804Timer.h>
+
+#include <ArmPlatform.h>
+
+/**
+ Initialize the Secure peripherals and memory regions
+
+ If Trustzone is supported by your platform then this function makes the required initialization
+ of the secure peripherals and memory regions.
+
+**/
+VOID
+ArmPlatformSecTrustzoneInit (
+ IN UINTN MpId
+ )
+{
+ // No TZPC or TZASC on RTSM to initialize
+}
+
+/**
+ Initialize controllers that must setup at the early stage
+
+ Some peripherals must be initialized in Secure World.
+ For example, some L2x0 requires to be initialized in Secure World
+
+**/
+RETURN_STATUS
+ArmPlatformSecInitialize (
+ IN UINTN MpId
+ )
+{
+ // If it is not the primary core then there is nothing to do
+ if (!IS_PRIMARY_CORE(MpId)) {
+ return RETURN_SUCCESS;
+ }
+
+ // Configure periodic timer (TIMER0) for 1MHz operation
+ MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);
+ // Configure 1MHz clock
+ MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);
+ // Configure SP810 to use 1MHz clock and disable
+ MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
+ // Configure SP810 to use 1MHz clock and disable
+ MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
+
+ return RETURN_SUCCESS;
+}
+
+/**
+ Call before jumping to Normal World
+
+ This function allows the firmware platform to do extra actions before
+ jumping to the Normal World
+
+**/
+VOID
+ArmPlatformSecExtraAction (
+ IN UINTN MpId,
+ OUT UINTN* JumpAddress
+ )
+{
+ *JumpAddress = PcdGet32(PcdFvBaseAddress);
+}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf index 3dfa756d..8d4f52c5 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf @@ -1,35 +1,35 @@ -#/** @file -# -# Component description file for ArmVExpressSysConfigLib module -# -# Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR> -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#**/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = ArmVExpressSysConfigLib - FILE_GUID = a05b5cc0-82d2-11e0-82cb-0002a5d5c51b - MODULE_TYPE = BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = ArmPlatformSysConfigLib - -[Sources.common] - ArmVExpressSysConfig.c - -[Packages] - MdePkg/MdePkg.dec - ArmPlatformPkg/ArmVExpressPkg/ArmVExpressPkg.dec - ArmPlatformPkg/ArmPlatformPkg.dec - -[LibraryClasses] - BaseLib - IoLib +#/** @file
+#
+# Component description file for ArmVExpressSysConfigLib module
+#
+# Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmVExpressSysConfigLib
+ FILE_GUID = a05b5cc0-82d2-11e0-82cb-0002a5d5c51b
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmPlatformSysConfigLib
+
+[Sources.common]
+ ArmVExpressSysConfig.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ ArmPlatformPkg/ArmVExpressPkg/ArmVExpressPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ IoLib
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf index 73a17fb8..6a1814e0 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf @@ -41,4 +41,4 @@ HdLcdArmVExpress.c [Pcd]
gArmVExpressTokenSpaceGuid.PcdPL111LcdMaxMode
- gArmVExpressTokenSpaceGuid.PcdHdLcdVideoModeOscId
\ No newline at end of file + gArmVExpressTokenSpaceGuid.PcdHdLcdVideoModeOscId
\ No newline at end of file diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf index 45af9212..af227d5e 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf @@ -1,32 +1,32 @@ -#/** @file -# -# Copyright (c) 2011, ARM Ltd. All rights reserved.<BR> -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#**/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = NorFlashArmVExpressLib - FILE_GUID = c0f5dfa0-7599-11e0-9665-0002a5d5c51b - MODULE_TYPE = DXE_DRIVER - VERSION_STRING = 1.0 - LIBRARY_CLASS = NorFlashPlatformLib - -[Sources.common] - NorFlashArmVExpress.c - -[Packages] - MdePkg/MdePkg.dec - ArmPlatformPkg/ArmPlatformPkg.dec - -[LibraryClasses] - BaseLib - DebugLib - IoLib +#/** @file
+#
+# Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = NorFlashArmVExpressLib
+ FILE_GUID = c0f5dfa0-7599-11e0-9665-0002a5d5c51b
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = NorFlashPlatformLib
+
+[Sources.common]
+ NorFlashArmVExpress.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ DebugLib
+ IoLib
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf index c9b6a98c..2440ea99 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf @@ -1,43 +1,43 @@ -#/** @file -# -# Component description file for ArmVeGraphicsDxe module -# -# Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR> -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#**/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = PL111LcdArmVExpressLib - FILE_GUID = b7f06f20-496f-11e0-a8e8-0002a5d5c51b - MODULE_TYPE = DXE_DRIVER - VERSION_STRING = 1.0 - LIBRARY_CLASS = LcdPlatformLib - -[Sources.common] - PL111LcdArmVExpress.c - -[Packages] - MdePkg/MdePkg.dec - ArmPlatformPkg/ArmVExpressPkg/ArmVExpressPkg.dec - ArmPlatformPkg/ArmPlatformPkg.dec - -[LibraryClasses] - BaseLib - ArmPlatformSysConfigLib - -[Protocols] - gEfiEdidDiscoveredProtocolGuid # Produced - gEfiEdidActiveProtocolGuid # Produced - -[Pcd] - gArmVExpressTokenSpaceGuid.PcdPL111LcdMaxMode - gArmVExpressTokenSpaceGuid.PcdPL111LcdVideoModeOscId +#/** @file
+#
+# Component description file for ArmVeGraphicsDxe module
+#
+# Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = PL111LcdArmVExpressLib
+ FILE_GUID = b7f06f20-496f-11e0-a8e8-0002a5d5c51b
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = LcdPlatformLib
+
+[Sources.common]
+ PL111LcdArmVExpress.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ ArmPlatformPkg/ArmVExpressPkg/ArmVExpressPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ ArmPlatformSysConfigLib
+
+[Protocols]
+ gEfiEdidDiscoveredProtocolGuid # Produced
+ gEfiEdidActiveProtocolGuid # Produced
+
+[Pcd]
+ gArmVExpressTokenSpaceGuid.PcdPL111LcdMaxMode
+ gArmVExpressTokenSpaceGuid.PcdPL111LcdVideoModeOscId
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.c index a471eb26..f8583175 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.c +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.c @@ -1,81 +1,81 @@ -/** @file - Template library implementation to support ResetSystem Runtime call. - - Fill in the templates with what ever makes you system reset. - - - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> - - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include <PiDxe.h> - -#include <Library/BaseLib.h> -#include <Library/DebugLib.h> -#include <Library/EfiResetSystemLib.h> -#include <Library/ArmPlatformSysConfigLib.h> - -#include <ArmPlatform.h> - -/** - Resets the entire platform. - - @param ResetType The type of reset to perform. - @param ResetStatus The status code for the reset. - @param DataSize The size, in bytes, of WatchdogData. - @param ResetData For a ResetType of EfiResetCold, EfiResetWarm, or - EfiResetShutdown the data buffer starts with a Null-terminated - Unicode string, optionally followed by additional binary data. - -**/ -EFI_STATUS -EFIAPI -LibResetSystem ( - IN EFI_RESET_TYPE ResetType, - IN EFI_STATUS ResetStatus, - IN UINTN DataSize, - IN CHAR16 *ResetData OPTIONAL - ) -{ - switch (ResetType) { - case EfiResetWarm: - // Map a warm reset into a cold reset - case EfiResetCold: - case EfiResetShutdown: - // Send the REBOOT function to the platform microcontroller - ArmPlatformSysConfigSet (SYS_CFG_REBOOT, 0); - - // We should never be here - while(1); - } - - ASSERT(FALSE); - return EFI_UNSUPPORTED; -} - -/** - Initialize any infrastructure required for LibResetSystem () to function. - - @param ImageHandle The firmware allocated handle for the EFI image. - @param SystemTable A pointer to the EFI System Table. - - @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS. - -**/ -EFI_STATUS -EFIAPI -LibInitializeResetSystem ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - return EFI_SUCCESS; -} +/** @file
+ Template library implementation to support ResetSystem Runtime call.
+
+ Fill in the templates with what ever makes you system reset.
+
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiDxe.h>
+
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/EfiResetSystemLib.h>
+#include <Library/ArmPlatformSysConfigLib.h>
+
+#include <ArmPlatform.h>
+
+/**
+ Resets the entire platform.
+
+ @param ResetType The type of reset to perform.
+ @param ResetStatus The status code for the reset.
+ @param DataSize The size, in bytes, of WatchdogData.
+ @param ResetData For a ResetType of EfiResetCold, EfiResetWarm, or
+ EfiResetShutdown the data buffer starts with a Null-terminated
+ Unicode string, optionally followed by additional binary data.
+
+**/
+EFI_STATUS
+EFIAPI
+LibResetSystem (
+ IN EFI_RESET_TYPE ResetType,
+ IN EFI_STATUS ResetStatus,
+ IN UINTN DataSize,
+ IN CHAR16 *ResetData OPTIONAL
+ )
+{
+ switch (ResetType) {
+ case EfiResetWarm:
+ // Map a warm reset into a cold reset
+ case EfiResetCold:
+ case EfiResetShutdown:
+ // Send the REBOOT function to the platform microcontroller
+ ArmPlatformSysConfigSet (SYS_CFG_REBOOT, 0);
+
+ // We should never be here
+ while(1);
+ }
+
+ ASSERT(FALSE);
+ return EFI_UNSUPPORTED;
+}
+
+/**
+ Initialize any infrastructure required for LibResetSystem () to function.
+
+ @param ImageHandle The firmware allocated handle for the EFI image.
+ @param SystemTable A pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.
+
+**/
+EFI_STATUS
+EFIAPI
+LibInitializeResetSystem (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ return EFI_SUCCESS;
+}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.inf index 3965e211..8dbd1c86 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.inf +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.inf @@ -1,35 +1,35 @@ -#/** @file -# Reset System lib to make it easy to port new platforms -# -# Copyright (c) 2008, Apple Inc. All rights reserved.<BR> -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -# -#**/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = ArmVeResetSystemLib - FILE_GUID = 36885202-0854-4373-bfd2-95d229b44d44 - MODULE_TYPE = BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = EfiResetSystemLib - -[Sources.common] - ResetSystemLib.c - -[Packages] - MdePkg/MdePkg.dec - EmbeddedPkg/EmbeddedPkg.dec - ArmPlatformPkg/ArmPlatformPkg.dec - -[LibraryClasses] - DebugLib - BaseLib - ArmPlatformSysConfigLib +#/** @file
+# Reset System lib to make it easy to port new platforms
+#
+# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmVeResetSystemLib
+ FILE_GUID = 36885202-0854-4373-bfd2-95d229b44d44
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = EfiResetSystemLib
+
+[Sources.common]
+ ResetSystemLib.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+ DebugLib
+ BaseLib
+ ArmPlatformSysConfigLib
|