summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2016-10-18 12:02:55 +0100
committerPeter Maydell <peter.maydell@linaro.org>2016-10-18 12:02:55 +0100
commitce109fb12bb5d96a1e35bb54d330937a2e44b174 (patch)
tree4a0cee1184bf26250b16b4c820cefee8575bfa15
parent638b7664e56967f0754182cea65a47be098551e5 (diff)
semihosting tests: Support semihosting 2.0 HLT traps
For semihosting 2.0, trap instructions via HLT for A32 and T32 are defined. Add test cases that these trap instructions work for both user mode and system emulation. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--Makefile29
-rw-r--r--semicall.S19
2 files changed, 47 insertions, 1 deletions
diff --git a/Makefile b/Makefile
index 67794c8..b223574 100644
--- a/Makefile
+++ b/Makefile
@@ -19,6 +19,7 @@
#
# We have several orthogonal cases we'd like to test:
# A32 vs T32 vs A64
+# old syscall vs new HLT (for A32 and T32)
# usermode vs system
# gdb syscalls vs normal
@@ -68,6 +69,12 @@ usertest-a32: $(usertest-srcs)
usertest-t32: $(usertest-srcs)
$(T32GCC) --static -o $@ $^
+usertest-a32-hlt: $(usertest-srcs)
+ $(A32GCC) -DUSE_HLT --static -o $@ $^
+
+usertest-t32-hlt: $(usertest-srcs)
+ $(T32GCC) -DUSE_HLT --static -o $@ $^
+
usertest-a64: $(usertest-srcs)
$(A64GCC) --static -o $@ $^
@@ -77,6 +84,12 @@ systest-a32.axf: $(systest-srcs)
systest-t32.axf: $(systest-srcs)
$(T32GCC) -nostdlib -o $@ $^ -lgcc -Xlinker --script=baremetal.lds
+systest-a32-hlt.axf: $(systest-srcs)
+ $(A32GCC) -DUSE_HLT -nostdlib -o $@ $^ -lgcc -Xlinker --script=baremetal.lds
+
+systest-t32-hlt.axf: $(systest-srcs)
+ $(T32GCC) -DUSE_HLT -nostdlib -o $@ $^ -lgcc -Xlinker --script=baremetal.lds
+
systest-a64.axf: $(systest-srcs)
$(A64GCC) -nostdlib -o $@ $^ -lgcc -Xlinker --script=baremetal-a64.lds
@@ -86,6 +99,12 @@ run-usertest-a32: usertest-a32
run-usertest-t32: usertest-t32
$(QEMU_ARM) usertest-t32
+run-usertest-a32-hlt: usertest-a32-hlt
+ $(QEMU_ARM) usertest-a32-hlt
+
+run-usertest-t32-hlt: usertest-t32-hlt
+ $(QEMU_ARM) usertest-t32-hlt
+
run-usertest-a64: usertest-a64
$(QEMU_AARCH64) usertest-a64
@@ -95,9 +114,17 @@ run-systest-a32: systest-a32.axf
run-systest-t32: systest-t32.axf
$(QEMU_SYSTEM_ARM) -M virt --display none --semihosting -kernel $^
+run-systest-a32-hlt: systest-a32-hlt.axf
+ $(QEMU_SYSTEM_ARM) -M virt --display none --semihosting -kernel $^
+
+run-systest-t32-hlt: systest-t32-hlt.axf
+ $(QEMU_SYSTEM_ARM) -M virt --display none --semihosting -kernel $^
+
run-systest-a64: systest-a64.axf
$(QEMU_SYSTEM_AARCH64) -M virt --display none --semihosting \
-cpu cortex-a57 -kernel $^
run: run-usertest-a32 run-usertest-t32 run-usertest-a64 \
- run-systest-a32 run-systest-t32 run-systest-a64
+ run-systest-a32 run-systest-t32 run-systest-a64 \
+ run-usertest-a32-hlt run-usertest-t32-hlt \
+ run-systest-a32-hlt run-systest-t32-hlt
diff --git a/semicall.S b/semicall.S
index 6634594..1418a42 100644
--- a/semicall.S
+++ b/semicall.S
@@ -35,11 +35,30 @@ __semi_call:
ret
#else
+#if defined(USE_HLT)
+ /* semihosting 2.0 hlt trap. We have to use literals
+ * here because the assembler refuses to assemble hlt
+ * for ARMv7 processors (but it is a semihosting trap
+ * regardless)
+ */
+
#if defined(__thumb__)
+ .short 0xbabc /* hlt 0x3c */
+#else
+ .word 0xe10f0070 /* hlt 0xf000 */
+#endif
+
+#else
+ /* traditional svc */
+#if defined(__thumb__)
+ /* NB: assumes not M-profile (which is BKPT) */
svc 0xab
#else
svc 0x123456
#endif
+
+#endif
+
bx lr
#endif