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authorRichard Henderson <richard.henderson@linaro.org>2018-06-22 15:12:04 +0100
committerPeter Maydell <peter.maydell@linaro.org>2018-07-02 13:08:21 +0100
commit3e7398eb1e0c7d5b8c1c45f5ac15ca2fd8a8661a (patch)
tree451bb2da4635fe0340baab043865481ab33eb79e
parent52372e6a2193976a3b8c354d8fef68a762846a63 (diff)
risu_reginfo_aarch64: limit SVE_VQ_MAX to current architecture
The kernel headers optimistically assume it's going to grow but as we are never going to use that many on current hardware we limit SVE_VQ_MAX to what we will. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20180622141205.16306-22-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--risu_reginfo_aarch64.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/risu_reginfo_aarch64.h b/risu_reginfo_aarch64.h
index b3701b3..c33b86f 100644
--- a/risu_reginfo_aarch64.h
+++ b/risu_reginfo_aarch64.h
@@ -31,6 +31,11 @@ struct sve_reginfo {
};
#endif
+/* The kernel headers set this based on future arch extensions.
+ The current arch maximum is 16. Save space below. */
+#undef SVE_VQ_MAX
+#define SVE_VQ_MAX 16
+
struct reginfo {
uint64_t fault_address;
uint64_t regs[31];