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authorMichael Davidsaver <mdavidsaver@gmail.com>2015-11-27 13:24:40 -0500
committerMichael Davidsaver <mdavidsaver@gmail.com>2015-11-27 13:24:40 -0500
commitcf990572f93e7fd4e563cad6bf46e62b84cff4a2 (patch)
treeb3c3ced356d708e06700a9d0cbac365c486e9cee
parentb8d043773e782a718d1323b71ca7187e4ad4a7e9 (diff)
test8: fixup mpu config
qemu is picky about alignment
-rw-r--r--test8.c18
1 files changed, 5 insertions, 13 deletions
diff --git a/test8.c b/test8.c
index 3239f83..5c5d8c9 100644
--- a/test8.c
+++ b/test8.c
@@ -140,7 +140,7 @@ void main(void)
{
run_table.hard = &hard_entry;
run_table.svc = &svc_entry;
- run_table.mem = &mem_entry;
+ run_table.mem = &mem_entry;
asm("cpsid if");
out32(SCB(0xd24), 1<<16); // enable MemFault with SHCSR
@@ -150,18 +150,10 @@ void main(void)
/* priority of entries is highest to lowest (0 checked last) */
- /* base for ROM */
- set_mpu(0, 0, (uint32_t)&__end_rom,
- MPU_NORMAL|MPU_RORO);
- /* prevent accidental *NULL */
-// set_mpu(1, 0, 64,
-// MPU_XN|MPU_NORMAL|MPU_NANA);
- /* base for RAM */
- set_mpu(2, 0x20000000, (uint32_t)(&__after_all_load)-0x20000000,
- MPU_NORMAL|MPU_RWRW);
- /* allow unpriv uart access */
- set_mpu(3, (uint32_t)UART_DATA, 1024,
- MPU_XN|MPU_DEVICE|MPU_RWRW);
+ set_mpu(0, 0x00000000, (uint32_t)&__end_rom, MPU_NORMAL|MPU_RORO);
+ set_mpu(1, 0x20000000, 0x00080000, MPU_NORMAL|MPU_RWRW|MPU_XN);
+ set_mpu(2, 0x4000c000, 0x00001000, MPU_DEVICE|MPU_RWRW|MPU_XN);
+ set_mpu(3, 0xe000e000, 0x00001000, MPU_DEVICE|MPU_RWRW|MPU_XN);
/* disable all access to offlimits[] */
set_mpu(4, (uint32_t)offlimits, sizeof(offlimits),