diff options
| author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2014-12-08 11:42:04 +0100 |
|---|---|---|
| committer | Paul Fertser <fercerpav@gmail.com> | 2015-04-14 11:47:48 +0100 |
| commit | e968fd189537892caaf91d6012e77bafa0b76751 (patch) | |
| tree | d08e897f3f1b508cdd1415c6d29f36189317d39f | |
| parent | 0836a0fa21e7f2363891c04b195ddb91f94abf28 (diff) | |
Cortex-A: Don't flush the data/unified cache if MMU is off
When the SCTLR has C set but M unset (i.e. Caching on, but MMU off) the cache
if effectively off. So only flush the cache if MMU is on, otherwise stale
entries might be committed to memory.
Change-Id: Iaff8b6f25b7a41ba838b91d45684c98f99fc0b27
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-on: http://openocd.zylin.com/2429
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Vladimir Svoboda <ze.vlad@gmail.com>
| -rw-r--r-- | src/target/cortex_a.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c index 9ae04322..ab52dd75 100644 --- a/src/target/cortex_a.c +++ b/src/target/cortex_a.c @@ -146,14 +146,14 @@ static int cortex_a_mmu_modify(struct target *target, int enable) cortex_a->cp15_control_reg_curr); } } else { - if (cortex_a->cp15_control_reg_curr & 0x4U) { - /* data cache is active */ - cortex_a->cp15_control_reg_curr &= ~0x4U; - /* flush data cache armv7 function to be called */ - if (armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache) - armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache(target); - } if ((cortex_a->cp15_control_reg_curr & 0x1U)) { + if (cortex_a->cp15_control_reg_curr & 0x4U) { + /* data cache is active */ + cortex_a->cp15_control_reg_curr &= ~0x4U; + /* flush data cache armv7 function to be called */ + if (armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache) + armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache(target); + } cortex_a->cp15_control_reg_curr &= ~0x1U; retval = armv7a->arm.mcr(target, 15, 0, 0, /* op1, op2 */ |