[WIP] ARM: dts: qcom: sdx55-t55: Enable PCIe RC and PCIe PHYsdx55-wifi

TODO: Split the power on node into a separate commit and use the same
PHY.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

2 files changed, 102 insertions, 1 deletions

diff --git a/arch/arm/boot/dts/qcom-pmx55.dtsi b/arch/arm/boot/dts/qcom-pmx55.dtsi
index 6571b88d018a..c3bc8e9ac583 100644
--- a/arch/arm/boot/dts/qcom-pmx55.dtsi
+++ b/arch/arm/boot/dts/qcom-pmx55.dtsi
@@ -72,6 +72,17 @@
 			#gpio-cells = <2>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
+
+			bt_en_state: bt-default-state {
+				bt-en {
+					pins = "gpio6";
+					function = "normal";
+					qcom,drive-strength = <2>;
+					output-low;
+					bias-pull-up;
+					power-source = <1>;
+				};
+			};
 		};
 	};
 
diff --git a/arch/arm/boot/dts/qcom-sdx55-t55.dts b/arch/arm/boot/dts/qcom-sdx55-t55.dts
index 7ed8feb99afb..9d0e841d45d0 100644
--- a/arch/arm/boot/dts/qcom-sdx55-t55.dts
+++ b/arch/arm/boot/dts/qcom-sdx55-t55.dts
@@ -95,6 +95,26 @@
 
 		vin-supply = <&vph_pwr>;
 	};
+
+	qca639x: qca639x {
+		compatible = "qcom,qca6390";
+		#power-domain-cells = <0>;
+
+		vddaon-supply = <&vreg_s3e_0p824>;
+		vddpmu-supply = <&vreg_s3e_0p824>;
+		vddrfa1-supply = <&vreg_s3e_0p824>;
+		vddrfa2-supply = <&vreg_s2e_1p224>;
+		vddrfa3-supply = <&vreg_s4e_1p904>;
+		vddpcie1-supply = <&vreg_s2e_1p224>;
+		vddpcie2-supply = <&vreg_s4e_1p904>;
+		vddio-supply = <&vreg_l6e_bb_1p8>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&wlan_en_state>, <&bt_en_state>;
+
+		wlan-en-gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>;
+		bt-en-gpios = <&pmx55_gpios 6 GPIO_ACTIVE_HIGH>;
+	};
 };
 
 &apps_rsc {
@@ -164,7 +184,7 @@
 			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
 		};
 
-		ldo6 {
+		vreg_l6e_bb_1p8: ldo6 {
 			regulator-min-microvolt = <1800000>;
 			regulator-max-microvolt = <1800000>;
 			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
@@ -242,6 +262,27 @@
 	memory-region = <&ipa_fw_mem>;
 };
 
+&pcie_rc_phy {
+	status = "okay";
+
+	vdda-phy-supply = <&vreg_l1e_bb_1p2>;
+	vdda-pll-supply = <&vreg_l4e_bb_0p875>;
+
+	/* Power on QCA639x chip, otherwise PCIe bus timeouts */
+	power-domains = <&qca639x>;
+};
+
+&pcie_rc {
+	status = "okay";
+
+	perst-gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
+	wake-gpios = <&tlmm 53 GPIO_ACTIVE_HIGH>;
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie_rc_clkreq_default &pcie_rc_perst_default
+		     &pcie_rc_wake_default>;
+};
+
 &qpic_bam {
 	status = "ok";
 };
@@ -265,6 +306,55 @@
 	memory-region = <&mpss_adsp_mem>;
 };
 
+&tlmm {
+	pcie_rc_clkreq_default: pcie_rc_clkreq_default {
+		mux {
+			pins = "gpio56";
+			function = "pcie_clkreq";
+		};
+		config {
+			pins = "gpio56";
+			drive-strength = <2>;
+			bias-disable;
+		};
+	};
+
+	pcie_rc_perst_default: pcie_rc_perst_default {
+		mux {
+			pins = "gpio57";
+			function = "gpio";
+		};
+		config {
+			pins = "gpio57";
+			drive-strength = <2>;
+			bias-pull-down;
+		};
+	};
+
+	pcie_rc_wake_default: pcie_rc_wake_default {
+		mux {
+			pins = "gpio53";
+			function = "gpio";
+		};
+		config {
+			pins = "gpio53";
+			drive-strength = <2>;
+			bias-disable;
+		};
+	};
+
+	wlan_en_state: wlan-default-state {
+		wlan-en {
+			pins = "gpio52";
+			function = "gpio";
+
+			drive-strength = <16>;
+			output-low;
+			bias-pull-up;
+		};
+	};
+};
+
 &usb_hsphy {
 	status = "okay";
 	vdda-pll-supply = <&vreg_l4e_bb_0p875>;