diff options
Diffstat (limited to 'boards/arm/96b_carbon/96b_carbon_defconfig')
| -rw-r--r-- | boards/arm/96b_carbon/96b_carbon_defconfig | 23 |
1 files changed, 13 insertions, 10 deletions
diff --git a/boards/arm/96b_carbon/96b_carbon_defconfig b/boards/arm/96b_carbon/96b_carbon_defconfig index ae11c05c2..28afa4498 100644 --- a/boards/arm/96b_carbon/96b_carbon_defconfig +++ b/boards/arm/96b_carbon/96b_carbon_defconfig @@ -23,18 +23,21 @@ CONFIG_GPIO_STM32_PORTD=y # clock configuration CONFIG_CLOCK_CONTROL=y -CONFIG_CLOCK_STM32F4X_SYSCLK_SRC_PLL=y + +# Clock configuration for Cube Clock control driver +CONFIG_CLOCK_STM32_HSE_CLOCK=16000000 +CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y # use HSE as PLL input -CONFIG_CLOCK_STM32F4X_PLL_SRC_HSE=y -# CONFIG_CLOCK_STM32F4X_HSE_BYPASS=y +CONFIG_CLOCK_STM32_PLL_SRC_HSE=y +# CONFIG_CLOCK_STM32_HSE_BYPASS=y # produce 84MHz clock at PLL output -CONFIG_CLOCK_STM32F4X_PLLM_DIV_FACTOR=16 -CONFIG_CLOCK_STM32F4X_PLLN_MULTIPLIER=336 -CONFIG_CLOCK_STM32F4X_PLLP_DIV_FACTOR=4 -CONFIG_CLOCK_STM32F4X_PLLQ_DIV_FACTOR=7 -CONFIG_CLOCK_STM32F4X_AHB_PRESCALER=0 -CONFIG_CLOCK_STM32F4X_APB1_PRESCALER=2 -CONFIG_CLOCK_STM32F4X_APB2_PRESCALER=0 +CONFIG_CLOCK_STM32_PLL_M_DIVISOR=16 +CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=336 +CONFIG_CLOCK_STM32_PLL_P_DIVISOR=4 +CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=7 +CONFIG_CLOCK_STM32_AHB_PRESCALER=1 +CONFIG_CLOCK_STM32_APB1_PRESCALER=2 +CONFIG_CLOCK_STM32_APB2_PRESCALER=1 #enable DTS CONFIG_HAS_DTS=y |