aboutsummaryrefslogtreecommitdiff
path: root/src/os_cpu/solaris_sparc/vm/solaris_sparc.il
blob: 2821c7077f04763140e7d7e1bd1e4ce999633cc2 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
//
// Copyright (c) 2002, 2011, Oracle and/or its affiliates. All rights reserved.
// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
//
// This code is free software; you can redistribute it and/or modify it
// under the terms of the GNU General Public License version 2 only, as
// published by the Free Software Foundation.
//
// This code is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// version 2 for more details (a copy is included in the LICENSE file that
// accompanied this code).
//
// You should have received a copy of the GNU General Public License version
// 2 along with this work; if not, write to the Free Software Foundation,
// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
//
// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
// or visit www.oracle.com if you need additional information or have any
// questions.
//  
//

  // Get the raw thread ID from %g7

       .inline  _raw_thread_id, 0
       .register %g7,#scratch
       .volatile
       mov     %g7, %o0
       .nonvolatile
       .end


  // Clear SPARC fprs.FEF DU and DL bits --
  // allows the kernel to avoid saving FPU state at context-switch time.
  // Use for state-transition points (into _thread_blocked) or when
  // parking. 
      
       .inline _mark_fpu_nosave, 0
       .volatile
       wr   %g0, 0, %fprs       
       .nonvolatile
       .end

  // Support for jint Atomic::xchg(jint exchange_value, volatile jint* dest).
  //
  // Arguments:
  //      exchange_value: O0
  //      dest:           O1
  //
  // Results:
  //     O0: the value previously stored in dest

        .inline _Atomic_swap32, 2
        .volatile
        swap    [%o1],%o0
        .nonvolatile
        .end


  // Support for intptr_t Atomic::xchg_ptr(intptr_t exchange_value, volatile intptr_t * dest).
  //
  // 64-bit
  //
  // Arguments:
  //      exchange_value: O0
  //      dest:           O1
  //
  // Results:
  //     O0: the value previously stored in dest

        .inline _Atomic_swap64, 2
        .volatile
    1:
        mov     %o0, %o3
        ldx     [%o1], %o2
        casx    [%o1], %o2, %o3
        cmp     %o2, %o3
        bne     %xcc, 1b
         nop
        mov     %o2, %o0
        .nonvolatile
        .end


  // Support for jint Atomic::cmpxchg(jint           exchange_value,
  //                                  volatile jint* dest, 
  //                                  jint           compare_value)
  //
  // Arguments:
  //      exchange_value: O0
  //      dest:           O1
  //      compare_value:  O2
  //
  // Results:
  //     O0: the value previously stored in dest

        .inline _Atomic_cas32, 3
        .volatile
        cas     [%o1], %o2, %o0
        .nonvolatile
        .end


  // Support for intptr_t Atomic::cmpxchg_ptr(intptr_t           exchange_value, 
  //                                          volatile intptr_t* dest, 
  //                                          intptr_t           compare_value)
  //
  // 64-bit
  //
  // Arguments:
  //      exchange_value: O0
  //      dest:           O1
  //      compare_value:  O2
  //
  // Results:
  //     O0: the value previously stored in dest

        .inline _Atomic_cas64, 3
        .volatile
        casx    [%o1], %o2, %o0
        .nonvolatile
        .end


  // Support for jlong Atomic::cmpxchg(jlong           exchange_value, 
  //                                   volatile jlong* dest, 
  //                                   jlong           compare_value)
  //
  // 32-bit calling conventions
  //
  // Arguments:
  //      exchange_value: O1:O0
  //      dest:           O2
  //      compare_value:  O4:O3
  //
  // Results:
  //     O1:O0: the value previously stored in dest

        .inline _Atomic_casl, 3
        .volatile
        sllx    %o0, 32, %o0
        srl     %o1, 0, %o1
        or      %o0,%o1,%o0
        sllx    %o3, 32, %o3
        srl     %o4, 0, %o4
        or      %o3,%o4,%o3
        casx    [%o2], %o3, %o0
        srl     %o0, 0, %o1
        srlx    %o0, 32, %o0
        .nonvolatile
        .end

  // Support for jlong Atomic::load and Atomic::store on v8.
  //
  // void _Atomic_move_long_v8(volatile jlong* src, volatile jlong* dst)
  //
  // Arguments:
  //      src:  O0
  //      dest: O1
  //
  // Overwrites O2 and O3

        .inline _Atomic_move_long_v8,2
        .volatile
        ldd     [%o0], %o2
        std     %o2, [%o1]
        .nonvolatile
        .end

  // Support for jlong Atomic::load and Atomic::store on v9.
  //
  // void _Atomic_move_long_v9(volatile jlong* src, volatile jlong* dst)
  //
  // Arguments:
  //      src:  O0
  //      dest: O1
  //
  // Overwrites O2

        .inline _Atomic_move_long_v9,2
        .volatile
        ldx     [%o0], %o2
        stx     %o2, [%o1]
        .nonvolatile
        .end

  // Support for jint Atomic::add(jint add_value, volatile jint* dest).
  //
  // Arguments:
  //      add_value: O0   (e.g., +1 or -1)
  //      dest:      O1
  //
  // Results:
  //     O0: the new value stored in dest
  //
  // Overwrites O3

        .inline _Atomic_add32, 2
        .volatile
    2:
        ld      [%o1], %o2
        add     %o0, %o2, %o3
        cas     [%o1], %o2, %o3
        cmp     %o2, %o3
        bne     2b
         nop
        add     %o0, %o2, %o0
        .nonvolatile
        .end


  // Support for intptr_t Atomic::add_ptr(intptr_t add_value, volatile intptr_t* dest)
  //
  // 64-bit
  //
  // Arguments:
  //      add_value: O0   (e.g., +1 or -1)
  //      dest:      O1
  //
  // Results:
  //     O0: the new value stored in dest
  //
  // Overwrites O3

        .inline _Atomic_add64, 2
        .volatile
    3:
        ldx     [%o1], %o2
        add     %o0, %o2, %o3
        casx    [%o1], %o2, %o3
        cmp     %o2, %o3
        bne     %xcc, 3b
         nop
        add     %o0, %o2, %o0
        .nonvolatile
        .end


  // Support for void OrderAccess::acquire()
  // The method is intentionally empty.  
  // It exists for the sole purpose of generating
  // a C/C++ sequence point over which the compiler won't 
  // reorder code.

        .inline _OrderAccess_acquire,0
        .volatile
        .nonvolatile
        .end


  // Support for void OrderAccess::fence()

        .inline _OrderAccess_fence,0
        .volatile
        membar  #StoreLoad
        .nonvolatile
        .end


  // Support for void Prefetch::read(void *loc, intx interval)
  //
  // Prefetch for several reads.

        .inline _Prefetch_read, 2
        .volatile
        prefetch [%o0+%o1], 0
        .nonvolatile
        .end


  // Support for void Prefetch::write(void *loc, intx interval)
  //
  // Prefetch for several writes.

        .inline _Prefetch_write, 2
        .volatile
        prefetch [%o0+%o1], 2
        .nonvolatile
        .end


  // Support for void Copy::conjoint_jlongs_atomic(jlong* from, jlong* to, size_t count)
  //
  // 32-bit
  //
  // Arguments:
  //      from:  O0
  //      to:    O1
  //      count: O2 treated as signed
  //
  // Clobbers:
  //      long_value: O2, O3
  //      count:      O4
  //
  // if (from > to) {
  //   while (--count >= 0) {
  //     *to++ = *from++;
  //   }
  // } else {
  //   while (--count >= 0) {
  //     to[count] = from[count];
  //   }
  // }
        .inline _Copy_conjoint_jlongs_atomic, 3
        .volatile
        cmp     %o0, %o1
        bleu    4f
        sll     %o2, 3, %o4
        ba      2f
    1:
        subcc   %o4, 8, %o4
        std     %o2, [%o1]
        add     %o0, 8, %o0
        add     %o1, 8, %o1
    2:
        bge,a   1b
        ldd     [%o0], %o2
        ba      5f
        nop
    3:
        std     %o2, [%o1+%o4]
    4:
        subcc   %o4, 8, %o4
        bge,a   3b
        ldd     [%o0+%o4], %o2
    5:
        .nonvolatile
        .end