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AgeCommit message (Expand)Author
2019-01-04Sanitise includes across codebaseAntonio Nino Diaz
2018-12-10AArch64: Use SSBS for CVE_2018_3639 mitigationJeenu Viswambharan
2018-10-29Fix MISRA defects in workaround and errata frameworkAntonio Nino Diaz
2018-10-29Fix MISRA defects in extension libsAntonio Nino Diaz
2018-10-29Make errata reporting mandatory for CPU filesSoby Mathew
2018-10-16ti: k3: common: Do not disable cache on TI K3 core powerdownAndrew F. Davis
2018-09-10Fix the Cortex-ares errata reporting function nameSoby Mathew
2018-09-04cpus: denver: Implement static workaround for CVE-2018-3639Varun Wadekar
2018-09-04cpus: denver: reset power state to 'C1' on bootVarun Wadekar
2018-09-04denver: use plat_my_core_pos() to get core positionVarun Wadekar
2018-08-23DSU erratum 936184 workaround: bug fixJohn Tsichritzis
2018-08-20Merge pull request #1388 from vwadekar/report-cve-2017-5715Dimitris Papastamos
2018-08-17cpus: denver: report CVE_2017_5715 mitigation to higher layersVarun Wadekar
2018-08-17DSU erratum 936184 workaroundJohn Tsichritzis
2018-07-11Add initial CPU support for Cortex-HeliosJoel Hutton
2018-07-11Add initial CPU support for Cortex-DeimosJoel Hutton
2018-07-11Add end_vector_entry assembler macroRoberto Vargas
2018-06-19cpulib: Add ISBs or comment why they are unneededDimitris Papastamos
2018-06-12Fix MISRA Rule 5.7 Part 1Daniel Boulby
2018-06-08Merge pull request #1397 from dp-arm/dp/cortex-a76Dimitris Papastamos
2018-06-08Implement dynamic mitigation for CVE-2018-3639 on Cortex-A76Dimitris Papastamos
2018-06-08Implement Cortex-Ares 1043202 erratum workaroundDimitris Papastamos
2018-06-08Add AMU support for Cortex-AresDimitris Papastamos
2018-06-08Add support for Cortex-Ares and Cortex-A76 CPUsIsla Mitchell
2018-06-07Fast path SMCCC_ARCH_WORKAROUND_1 calls from AArch32Dimitris Papastamos
2018-05-23Add support for dynamic mitigation for CVE-2018-3639Dimitris Papastamos
2018-05-23aarch32: Implement static workaround for CVE-2018-3639Dimitris Papastamos
2018-05-23Implement static workaround for CVE-2018-3639Dimitris Papastamos
2018-05-23Rename symbols and files relating to CVE-2017-5715Dimitris Papastamos
2018-05-15Workaround for CVE-2017-5715 on NVIDIA Denver CPUsVarun Wadekar
2018-04-12Check presence of fix for errata 835769 in Cortex-A53Jonathan Wright
2018-04-12Check presence of fix for errata 843419 in Cortex-A53Jonathan Wright
2018-03-14Fixup `SMCCC_ARCH_FEATURES` semanticsDimitris Papastamos
2018-03-14Use PFR0 to identify need for mitigation of CVE-2017-5715Dimitris Papastamos
2018-02-27MISRA fixes for Cortex A75 AMU implementationDimitris Papastamos
2018-02-27Refactor AMU support for Cortex A75Dimitris Papastamos
2018-02-27Factor out CPU AMU helpersDimitris Papastamos
2018-02-22Fixup AArch32 errata printing frameworkSoby Mathew
2018-02-02Merge pull request #1253 from dp-arm/dp/amu32davidcunado-arm
2018-01-31AMU: Implement context save/restore for aarch32Joel Hutton
2018-01-29Optimize SMCCC_ARCH_WORKAROUND_1 on Cortex A57/A72/A73 and A75Dimitris Papastamos
2018-01-29Optimize/cleanup BPIALL workaroundDimitris Papastamos
2018-01-25Merge pull request #1228 from dp-arm/dp/cve_2017_5715davidcunado-arm
2018-01-20Merge pull request #1229 from manojkumar-arm/manojkumar-arm/ca72-aarch32-rese...davidcunado-arm
2018-01-19Merge pull request #1200 from robertovargas-arm/bl2-el3davidcunado-arm
2018-01-19lib/cpus: fix branching in reset function for cortex-a72 AARCH32 modeManoj Kumar
2018-01-18Workaround for CVE-2017-5715 for Cortex A9, A15 and A17Dimitris Papastamos
2018-01-18Print erratum application report for CVE-2017-5715Dimitris Papastamos
2018-01-18Change the default errata format stringDimitris Papastamos
2018-01-18bl2-el3: Add BL2_EL3 imageRoberto Vargas
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