diff options
| author | Ryan Harkin <ryan.harkin@linaro.org> | 2012-07-26 19:05:10 +0100 |
|---|---|---|
| committer | Jon Medhurst <tixy@linaro.org> | 2012-07-26 20:05:34 +0100 |
| commit | 50f0053c5c22cf06f5ff9b00fb1b576f6ff47d17 (patch) | |
| tree | ea4fcdeeb97f19dea155b00c1fb91fedbe4887e5 | |
| parent | 39d28b2808894875caa6bf2b5286053782705318 (diff) | |
ARM: vexpress: configure CLCD driver device tree support for A9 CoreTiletracking-tracking-armlt-clcd-ll-20120727.0
Configuration for the amba-clcd PL111 driver is added to the A9 CoreTile's DTS
file.
Configuration of the motherboard CLCD driver is removed from the DTSI files to
prevent duplicate CLCD drivers being registered.
A generic set of CLCD panel descriptions has been split into its own DTSI file.
Currently, only XVGA and VGA monitors are described.
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
| -rw-r--r-- | arch/arm/boot/dts/clcd-panels.dtsi | 52 | ||||
| -rw-r--r-- | arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 8 | ||||
| -rw-r--r-- | arch/arm/boot/dts/vexpress-v2m.dtsi | 8 | ||||
| -rw-r--r-- | arch/arm/boot/dts/vexpress-v2p-ca9.dts | 6 |
4 files changed, 62 insertions, 12 deletions
diff --git a/arch/arm/boot/dts/clcd-panels.dtsi b/arch/arm/boot/dts/clcd-panels.dtsi new file mode 100644 index 000000000000..0b0ff6ead4b2 --- /dev/null +++ b/arch/arm/boot/dts/clcd-panels.dtsi @@ -0,0 +1,52 @@ +/* + * ARM Ltd. Versatile Express + * + */ + +/ { + panels { + panel@0 { + compatible = "panel"; + mode = "VGA"; + refresh = <60>; + xres = <640>; + yres = <480>; + pixclock = <39721>; + left_margin = <40>; + right_margin = <24>; + upper_margin = <32>; + lower_margin = <11>; + hsync_len = <96>; + vsync_len = <2>; + sync = <0>; + vmode = "FB_VMODE_NONINTERLACED"; + + tim2 = "TIM2_BCD", "TIM2_IPC"; + cntl = "CNTL_LCDTFT", "CNTL_BGR", "CNTL_LCDVCOMP(1)"; + caps = "CLCD_CAP_5551", "CLCD_CAP_565", "CLCD_CAP_888"; + bpp = <16>; + }; + + panel@1 { + compatible = "panel"; + mode = "XVGA"; + refresh = <60>; + xres = <1024>; + yres = <768>; + pixclock = <15748>; + left_margin = <152>; + right_margin = <48>; + upper_margin = <23>; + lower_margin = <3>; + hsync_len = <104>; + vsync_len = <4>; + sync = <0>; + vmode = "FB_VMODE_NONINTERLACED"; + + tim2 = "TIM2_BCD", "TIM2_IPC"; + cntl = "CNTL_LCDTFT", "CNTL_BGR", "CNTL_LCDVCOMP(1)"; + caps = "CLCD_CAP_5551", "CLCD_CAP_565", "CLCD_CAP_888"; + bpp = <16>; + }; + }; +}; diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi index 16076e2d0934..fd04b97e2508 100644 --- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi +++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi @@ -17,6 +17,8 @@ * CHANGES TO vexpress-v2m.dtsi! */ +/include/ "clcd-panels.dtsi" + / { aliases { arm,v2m_timer = &v2m_timer01; @@ -190,12 +192,6 @@ 0x1a0100 0xf00>; reg-shift = <2>; }; - - clcd@1f0000 { - compatible = "arm,pl111", "arm,primecell"; - reg = <0x1f0000 0x1000>; - interrupts = <14>; - }; }; }; }; diff --git a/arch/arm/boot/dts/vexpress-v2m.dtsi b/arch/arm/boot/dts/vexpress-v2m.dtsi index a6c9c7c82d53..4e85c1098818 100644 --- a/arch/arm/boot/dts/vexpress-v2m.dtsi +++ b/arch/arm/boot/dts/vexpress-v2m.dtsi @@ -17,6 +17,8 @@ * CHANGES TO vexpress-v2m-rs1.dtsi! */ +/include/ "clcd-panels.dtsi" + / { aliases { arm,v2m_timer = &v2m_timer01; @@ -189,12 +191,6 @@ 0x1a100 0xf00>; reg-shift = <2>; }; - - clcd@1f000 { - compatible = "arm,pl111", "arm,primecell"; - reg = <0x1f000 0x1000>; - interrupts = <14>; - }; }; }; }; diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts index 3f0c736d31d6..2ebb132113a3 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca9.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca9.dts @@ -9,6 +9,8 @@ /dts-v1/; +/memreserve/ 0x9f000000 0x01000000; + / { model = "V2P-CA9"; arm,hbi = <0x191>; @@ -70,6 +72,10 @@ compatible = "arm,pl111", "arm,primecell"; reg = <0x10020000 0x1000>; interrupts = <0 44 4>; + mode = "XVGA"; + arm,vexpress-osc = <1>; + use_dma = <1>; + framebuffer = <0x9f000000 0x01000000>; }; memory-controller@100e0000 { |