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author | Linaro CI <ci_notify@linaro.org> | 2021-11-29 21:26:14 +0000 |
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committer | Linaro CI <ci_notify@linaro.org> | 2021-11-29 21:26:14 +0000 |
commit | ee7e318c87bba2311edacbf94b184bde5d4fde8f (patch) | |
tree | dea3647c3a6daa9b59c1a26da57bd927327e795a /Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml | |
parent | 7fe6d9ab7817bfeed85dc9f7a1281835fc25edd3 (diff) | |
parent | 29728b9d377685df5486d10bdbbad7f481be3113 (diff) |
Merge remote-tracking branch 'sa8155p-adp-dts-drivers/tracking-qcomlt-sa8155p-dts-drivers' into integration-linux-qcomltintegration-linux-qcomlt-20211201-085240-v5.16-rc3-209-gee7e318c87bba2
Diffstat (limited to 'Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml | 115 |
1 files changed, 115 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml b/Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml new file mode 100644 index 000000000000..bf0a59e8a2bf --- /dev/null +++ b/Documentation/devicetree/bindings/dma/qcom_bam_dma.yaml @@ -0,0 +1,115 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/qcom_bam_dma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: QCOM BAM DMA controller binding + +maintainers: + - Bhupesh Sharma <bhupesh.sharma@linaro.org> + +description: | + This document defines the binding for the BAM DMA controller + found on Qualcomm parts. + +allOf: + - $ref: "dma-controller.yaml#" + +properties: + compatible: + enum: + - qcom,bam-v1.3.0 # for APQ8064, IPQ8064 and MSM8960 + - qcom,bam-v1.4.0 # for MSM8974, APQ8074 and APQ8084 + - qcom,bam-v1.7.0 # for MSM8916 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: bam_clk + + interrupts: + minItems: 1 + maxItems: 31 + + num-channels: + maximum: 31 + description: + Indicates supported number of DMA channels in a remotely controlled bam. + + "#dma-cells": + const: 1 + description: The single cell represents the channel index. + + interconnects: + maxItems: 1 + description: + Interconnect path between bam and main memory. + + interconnect-names: + const: memory + + iommus: + minItems: 1 + maxItems: 8 + description: + phandle(s) to apps_smmu node with sid mask. + + qcom,ee: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 7 + description: + Indicates the active Execution Environment identifier (0-7) + used in the secure world. + + qcom,controlled-remotely: + $ref: /schemas/types.yaml#/definitions/flag + description: + Indicates that the bam is controlled by remote proccessor i.e. + execution environment. + + qcom,powered-remotely: + $ref: /schemas/types.yaml#/definitions/flag + description: + Indicates that the bam is powered up by a remote processor + but must be initialized by the local processor. + + qcom,num-ees: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 31 + default: 2 + description: + Indicates supported number of Execution Environments in a + remotely controlled bam. + +required: + - compatible + - reg + - interrupts + - "#dma-cells" + - qcom,ee + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-msm8974.h> + dma-controller@f9984000 { + compatible = "qcom,bam-v1.4.0"; + reg = <0xf9984000 0x15000>; + interrupts = <0 94 0>; + clocks = <&gcc GCC_BAM_DMA_AHB_CLK>; + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = <0>; + iommus = <&apps_smmu 0x584 0x0011>, + <&apps_smmu 0x586 0x0011>, + <&apps_smmu 0x594 0x0011>, + <&apps_smmu 0x596 0x0011>; + }; |