diff options
Diffstat (limited to 'drivers/firmware/qcom_scm.h')
| -rw-r--r-- | drivers/firmware/qcom_scm.h | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h index 2cce75c08b99..5d7f0ef6fee7 100644 --- a/drivers/firmware/qcom_scm.h +++ b/drivers/firmware/qcom_scm.h @@ -36,6 +36,18 @@ extern int __qcom_scm_is_call_available(u32 svc_id, u32 cmd_id); extern int __qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp); +#define QCOM_SCM_SVC_PIL 0x2 +#define QCOM_SCM_PAS_INIT_IMAGE_CMD 0x1 +#define QCOM_SCM_PAS_MEM_SETUP_CMD 0x2 +#define QCOM_SCM_PAS_AUTH_AND_RESET_CMD 0x5 +#define QCOM_SCM_PAS_SHUTDOWN_CMD 0x6 +#define QCOM_SCM_PAS_IS_SUPPORTED_CMD 0x7 +extern bool __qcom_scm_pas_supported(u32 peripheral); +extern int __qcom_scm_pas_init_image(struct device *dev, u32 peripheral, const void *metadata, size_t size); +extern int __qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, phys_addr_t size); +extern int __qcom_scm_pas_auth_and_reset(u32 peripheral); +extern int __qcom_scm_pas_shutdown(u32 peripheral); + /* common error codes */ #define QCOM_SCM_ENOMEM -5 #define QCOM_SCM_EOPNOTSUPP -4 @@ -43,5 +55,65 @@ extern int __qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, #define QCOM_SCM_EINVAL_ARG -2 #define QCOM_SCM_ERROR -1 #define QCOM_SCM_INTERRUPTED 1 +#define QCOM_SCM_EBUSY -55 +#define QCOM_SCM_V2_EBUSY -12 + + +static inline int qcom_scm_remap_error(int err) +{ + switch (err) { + case QCOM_SCM_ERROR: + return -EIO; + case QCOM_SCM_EINVAL_ADDR: + case QCOM_SCM_EINVAL_ARG: + return -EINVAL; + case QCOM_SCM_EOPNOTSUPP: + return -EOPNOTSUPP; + case QCOM_SCM_ENOMEM: + return -ENOMEM; + case QCOM_SCM_EBUSY: + return QCOM_SCM_EBUSY; + case QCOM_SCM_V2_EBUSY: + return QCOM_SCM_V2_EBUSY; + } + return -EINVAL; +} + +enum scm_cmd { + PAS_INIT_IMAGE_CMD = 1, + PAS_MEM_SETUP_CMD, + PAS_AUTH_AND_RESET_CMD = 5, + PAS_SHUTDOWN_CMD, +}; + +#define SCM_SVC_BOOT 0x1 +#define SCM_SVC_PIL 0x2 +#define SCM_SVC_INFO 0x6 + +#define GET_FEAT_VERSION_CMD 3 + +extern int __qcom_scm_pil_init_image_cmd(u32 proc, u64 image_addr); +extern int __qcom_scm_pil_mem_setup_cmd(u32 proc, u64 start_addr, u32 len); +extern int __qcom_scm_pil_auth_and_reset_cmd(u32 proc); +extern int __qcom_scm_pil_shutdown_cmd(u32 proc); + +extern int __qcom_scm_iommu_dump_fault_regs(u32 id, u32 context, u64 addr, + u32 len); +extern int __qcom_scm_iommu_set_cp_pool_size(u32 size, u32 spare); +extern int __qcom_scm_iommu_secure_ptbl_size(u32 spare, int psize[2]); +extern int __qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare); +extern int __qcom_scm_iommu_secure_map(u64 list, u32 list_size, u32 size, + u32 id, u32 ctx_id, u64 va, + u32 info_size, u32 flags); +extern int __qcom_scm_iommu_secure_unmap(u32 id, u32 ctx_id, u64 va, + u32 size, u32 flags); + +extern int __qcom_scm_is_call_available(u32 svc_id, u32 cmd_id); +extern int __qcom_scm_get_feat_version(u32 feat); +extern int __qcom_scm_restore_sec_cfg(u32 device_id, u32 spare); +extern int __qcom_scm_set_video_state(u32 state, u32 spare); +extern int __qcom_scm_mem_protect_video_var(u32 start, u32 size, + u32 nonpixel_start, + u32 nonpixel_size); #endif |