diff options
| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-04-11 22:12:55 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-04-13 12:51:49 +0200 |
| commit | 0fd2c201482e62492f2d7dc6c2798cf7f66c9570 (patch) | |
| tree | 4351ec592764f5647701c158df34663863fbf7a7 /drivers/gpu/drm/i915/intel_ringbuffer.c | |
| parent | e48d86347c602c55159714f6ddcd88969a1b2f21 (diff) | |
drm/i915: don't enable the gen6 bsd ring tail write enable on gen7
HW engineers have fixed this issue for ivb. Again, a nice cleanup
possible thanks to the more flexible ring initialization.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_ringbuffer.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 7e1f2211ea2..68e1255452f 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -1415,9 +1415,12 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev) ring->name = "bsd ring"; ring->id = VCS; + ring->write_tail = ring_write_tail; if (IS_GEN6(dev) || IS_GEN7(dev)) { ring->mmio_base = GEN6_BSD_RING_BASE; - ring->write_tail = gen6_bsd_ring_write_tail; + /* gen6 bsd needs a special wa for tail updates */ + if (IS_GEN6(dev)) + ring->write_tail = gen6_bsd_ring_write_tail; ring->flush = gen6_ring_flush; ring->add_request = gen6_add_request; ring->get_seqno = gen6_ring_get_seqno; @@ -1433,7 +1436,6 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev) ring->signal_mbox[1] = GEN6_BVSYNC; } else { ring->mmio_base = BSD_RING_BASE; - ring->write_tail = ring_write_tail; ring->flush = bsd_ring_flush; ring->add_request = ring_add_request; ring->get_seqno = ring_get_seqno; |