diff options
| author | Alexander Graf <[agraf@suse.de]> | 2013-04-04 14:30:13 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2013-04-09 01:39:13 +0900 |
| commit | 849ff89b7b6b9f99bdae27b8d841423b907451b9 (patch) | |
| tree | 40475c1240ac967c73b557d9a265f73ae9236b16 /arch/arm/boot/dts/exynos5250.dtsi | |
| parent | 2d2ff61d0691a26128257cee88278a9940d9e92b (diff) | |
ARM: dts: Declare the gic as a15 compatible for exynos5250
The GIC in the exynos5250 SoC is A15 compliant. Show this through
the device tree, so that we can use the GIC for KVM.
Also add the respective A15 memory regions and interrupt links.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/boot/dts/exynos5250.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/exynos5250.dtsi | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 1dc26009e3a..4352f5b336e 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -68,10 +68,14 @@ }; gic:interrupt-controller@10481000 { - compatible = "arm,cortex-a9-gic"; + compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; #interrupt-cells = <3>; interrupt-controller; - reg = <0x10481000 0x1000>, <0x10482000 0x2000>; + reg = <0x10481000 0x1000>, + <0x10482000 0x1000>, + <0x10484000 0x2000>, + <0x10486000 0x2000>; + interrupts = <1 9 0xf04>; }; combiner:interrupt-controller@10440000 { |