U5500: Add support for PRCMU Mailbox0

Add PRCMU mailbox 0 support for irq wakeup
enable and disable

ST-Ericsson Linux next: -
ST-Ericsson ID: WP334774
ST-Ericsson FOSS-OUT ID: Trivial

Change-Id: Ib8972e2de8ca81ca796b3dcd7327a8888efff51b
Signed-off-by: Vijaya Kumar K <vijay.kilari@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/24271
Reviewed-by: Mattias NILSSON <mattias.i.nilsson@stericsson.com>

4 files changed, 65 insertions, 13 deletions

diff --git a/arch/arm/mach-ux500/include/mach/irqs-db5500.h b/arch/arm/mach-ux500/include/mach/irqs-db5500.h
index 77239776a6f..d8d00b6c2ba 100644
--- a/arch/arm/mach-ux500/include/mach/irqs-db5500.h
+++ b/arch/arm/mach-ux500/include/mach/irqs-db5500.h
@@ -85,6 +85,35 @@
 
 #ifdef CONFIG_UX500_SOC_DB5500
 
+/* Virtual interrupts corresponding to the PRCMU wakeups.  */
+#define IRQ_DB5500_PRCMU_BASE IRQ_SOC_START
+
+#define IRQ_DB5500_PRCMU_RTC (IRQ_DB5500_PRCMU_BASE)
+#define IRQ_DB5500_PRCMU_RTT0 (IRQ_DB5500_PRCMU_BASE + 1)
+#define IRQ_DB5500_PRCMU_RTT1 (IRQ_DB5500_PRCMU_BASE + 2)
+#define IRQ_DB5500_PRCMU_CD_IRQ (IRQ_DB5500_PRCMU_BASE + 3)
+#define IRQ_DB5500_PRCMU_SRP_TIM (IRQ_DB5500_PRCMU_BASE + 4)
+#define IRQ_DB5500_PRCMU_APE_REQ (IRQ_DB5500_PRCMU_BASE + 5)
+#define IRQ_DB5500_PRCMU_USB (IRQ_DB5500_PRCMU_BASE + 6)
+#define IRQ_DB5500_PRCMU_ABB (IRQ_DB5500_PRCMU_BASE + 7)
+#define IRQ_DB5500_PRCMU_ARM (IRQ_DB5500_PRCMU_BASE + 8)
+#define IRQ_DB5500_PRCMU_MODEM_SW_RESET_REQ (IRQ_DB5500_PRCMU_BASE + 9)
+#define IRQ_DB5500_PRCMU_AC_WAKE_ACK (IRQ_DB5500_PRCMU_BASE + 10)
+#define IRQ_DB5500_PRCMU_GPIO0 (IRQ_DB5500_PRCMU_BASE + 11)
+#define IRQ_DB5500_PRCMU_GPIO1 (IRQ_DB5500_PRCMU_BASE + 12)
+#define IRQ_DB5500_PRCMU_GPIO2 (IRQ_DB5500_PRCMU_BASE + 13)
+#define IRQ_DB5500_PRCMU_GPIO3 (IRQ_DB5500_PRCMU_BASE + 14)
+#define IRQ_DB5500_PRCMU_GPIO4 (IRQ_DB5500_PRCMU_BASE + 15)
+#define IRQ_DB5500_PRCMU_GPIO5 (IRQ_DB5500_PRCMU_BASE + 16)
+#define IRQ_DB5500_PRCMU_GPIO6 (IRQ_DB5500_PRCMU_BASE + 17)
+#define IRQ_DB5500_PRCMU_GPIO7 (IRQ_DB5500_PRCMU_BASE + 18)
+#define IRQ_DB5500_PRCMU_AC_REL_ACK (IRQ_DB5500_PRCMU_BASE + 19)
+#define IRQ_DB5500_PRCMU_LOW_POWER_AUDIO (IRQ_DB5500_PRCMU_BASE + 20)
+#define IRQ_DB5500_PRCMU_TEMP_SENSOR (IRQ_DB5500_PRCMU_BASE + 21)
+#define IRQ_DB5500_PRCMU_END (IRQ_DB5500_PRCMU_BASE + 22)
+
+#define NUM_DB5500_PRCMU_WAKEUPS (IRQ_DB5500_PRCMU_END - IRQ_DB5500_PRCMU_BASE)
+
 /*
  * After the GPIO ones we reserve a range of IRQ:s in which virtual
  * IRQ:s representing modem IRQ:s can be allocated
diff --git a/arch/arm/mach-ux500/include/mach/prcmu-db5500.h b/arch/arm/mach-ux500/include/mach/prcmu-db5500.h
index 2a43ea86516..10747dd08d6 100644
--- a/arch/arm/mach-ux500/include/mach/prcmu-db5500.h
+++ b/arch/arm/mach-ux500/include/mach/prcmu-db5500.h
@@ -19,6 +19,8 @@ int db5500_prcmu_set_epod(u16 epod_id, u8 epod_state);
 int db5500_prcmu_set_display_clocks(void);
 int db5500_prcmu_disable_dsipll(void);
 int db5500_prcmu_enable_dsipll(void);
+void db5500_prcmu_config_abb_event_readout(u32 abb_events);
+void db5500_prcmu_get_abb_event_buffer(void __iomem **buf);
 int prcmu_resetout(u8 resoutn, u8 state);
 
 static inline int db5500_prcmu_set_power_state(u8 state, bool keep_ulp_clk,
@@ -72,15 +74,9 @@ static inline int db5500_prcmu_set_epod(u16 epod_id, u8 epod_state)
 	return 0;
 }
 
-#endif /* CONFIG_UX500_SOC_DB5500 */
+static inline void db5500_prcmu_get_abb_event_buffer(void __iomem **buf) {}
+static inline void db5500_prcmu_config_abb_event_readout(u32 abb_events) {}
 
-static inline int db5500_prcmu_config_abb_event_readout(u32 abb_events)
-{
-#ifdef CONFIG_MACH_U5500_SIMULATOR
-	return 0;
-#else
-	return -1;
-#endif
-}
+#endif /* CONFIG_UX500_SOC_DB5500 */
 
 #endif /* __MACH_PRCMU_U5500_H */
diff --git a/arch/arm/mach-ux500/include/mach/prcmu-db8500.h b/arch/arm/mach-ux500/include/mach/prcmu-db8500.h
index 7b620ddc4e9..3ebf8274312 100644
--- a/arch/arm/mach-ux500/include/mach/prcmu-db8500.h
+++ b/arch/arm/mach-ux500/include/mach/prcmu-db8500.h
@@ -200,8 +200,6 @@ enum ap_pwrst prcmu_get_xp70_current_state(void);
 /* TODO: Common API with DB5500? */
 int prcmu_config_esram0_deep_sleep(u8 state);
 bool prcmu_has_arm_maxopp(void);
-void prcmu_config_abb_event_readout(u32 abb_events);
-void prcmu_get_abb_event_buffer(void __iomem **buf);
 int prcmu_config_hotdog(u8 threshold);
 int prcmu_config_hotmon(u8 low, u8 high);
 int prcmu_start_temp_sense(u16 cycles32k);
@@ -218,6 +216,8 @@ int db8500_prcmu_request_clock(u8 clock, bool enable);
 int db8500_prcmu_set_display_clocks(void);
 int db8500_prcmu_disable_dsipll(void);
 int db8500_prcmu_enable_dsipll(void);
+void db8500_prcmu_config_abb_event_readout(u32 abb_events);
+void db8500_prcmu_get_abb_event_buffer(void __iomem **buf);
 
 #else /* !CONFIG_UX500_SOC_DB8500 */
 
@@ -281,8 +281,6 @@ static inline bool prcmu_has_arm_maxopp(void)
 	return false;
 }
 
-static inline void prcmu_config_abb_event_readout(u32 abb_events) {}
-
 static inline int prcmu_config_hotdog(u8 threshold)
 {
 	return 0;
@@ -346,6 +344,11 @@ static inline int db8500_prcmu_enable_dsipll(void)
 {
 	return 0;
 }
+
+static inline void db8500_prcmu_config_abb_event_readout(u32 abb_events) {}
+
+static inline void db8500_prcmu_get_abb_event_buffer(void __iomem **buf) {}
+
 #endif /* CONFIG_UX500_SOC_DB8500 */
 
 #endif /* __MACH_PRCMU_DB8500_H */
diff --git a/arch/arm/mach-ux500/include/mach/prcmu.h b/arch/arm/mach-ux500/include/mach/prcmu.h
index 5f89152f8b2..67fe875e0a6 100644
--- a/arch/arm/mach-ux500/include/mach/prcmu.h
+++ b/arch/arm/mach-ux500/include/mach/prcmu.h
@@ -23,6 +23,7 @@ enum prcmu_wakeup_index {
 	PRCMU_WAKEUP_INDEX_ABB,
 	PRCMU_WAKEUP_INDEX_ABB_FIFO,
 	PRCMU_WAKEUP_INDEX_ARM,
+	PRCMU_WAKEUP_INDEX_CD_IRQ,
 	NUM_PRCMU_WAKEUP_INDICES
 };
 #define PRCMU_WAKEUP(_name) (BIT(PRCMU_WAKEUP_INDEX_##_name))
@@ -238,6 +239,22 @@ static inline void prcmu_disable_wakeups(void)
 	prcmu_enable_wakeups(0);
 }
 
+static inline void prcmu_config_abb_event_readout(u32 abb_events)
+{
+	if (machine_is_u5500())
+		db5500_prcmu_config_abb_event_readout(abb_events);
+	else
+		db8500_prcmu_config_abb_event_readout(abb_events);
+}
+
+static inline void prcmu_get_abb_event_buffer(void __iomem **buf)
+{
+	if (machine_is_u5500())
+		db5500_prcmu_get_abb_event_buffer(buf);
+	else
+		db8500_prcmu_get_abb_event_buffer(buf);
+}
+
 int prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size);
 int prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size);
 
@@ -397,6 +414,13 @@ static inline int prcmu_enable_dsipll(void)
 	return 0;
 }
 
+static inline void prcmu_config_abb_event_readout(u32 abb_events) {}
+
+static inline void prcmu_get_abb_event_buffer(void __iomem **buf)
+{
+	*buf = NULL;
+}
+
 #endif
 
 #if defined(CONFIG_UX500_SOC_DB8500)