diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/video/mcde/display-generic_dsi.c | 18 | ||||
-rw-r--r-- | drivers/video/mcde/mcde_display.c | 7 | ||||
-rw-r--r-- | drivers/video/mcde/mcde_dss.c | 31 | ||||
-rw-r--r-- | drivers/video/mcde/mcde_fb.c | 14 | ||||
-rw-r--r-- | drivers/video/mcde/mcde_hw.c | 244 |
5 files changed, 166 insertions, 148 deletions
diff --git a/drivers/video/mcde/display-generic_dsi.c b/drivers/video/mcde/display-generic_dsi.c index 3391d2b3808..15b8ccec59a 100644 --- a/drivers/video/mcde/display-generic_dsi.c +++ b/drivers/video/mcde/display-generic_dsi.c @@ -106,6 +106,22 @@ static int __devinit generic_probe(struct mcde_display_device *dev) regulator_set_voltage(pdata->regulator, pdata->min_supply_voltage, pdata->max_supply_voltage); + /* + * When u-boot has display a startup screen. + * U-boot has turned on display power however the + * regulator framework does not know about that + * This is the case here, the display driver has to + * enable the regulator for the display. + */ + if (dev->power_mode == MCDE_DISPLAY_PM_STANDBY) { + ret = regulator_enable(pdata->regulator); + if (ret < 0) { + dev_err(&dev->dev, + "%s:Failed to enable regulator\n" + , __func__); + goto regulator_enable_failed; + } + } } dev->platform_enable = generic_platform_enable; dev->platform_disable = generic_platform_disable; @@ -119,7 +135,7 @@ static int __devinit generic_probe(struct mcde_display_device *dev) dev_info(&dev->dev, "Generic display probed\n"); goto out; - +regulator_enable_failed: regulator_get_failed: if (pdata->generic_platform_enable && pdata->reset_gpio) gpio_free(pdata->reset_gpio); diff --git a/drivers/video/mcde/mcde_display.c b/drivers/video/mcde/mcde_display.c index aa52eee7475..1537980dcaf 100644 --- a/drivers/video/mcde/mcde_display.c +++ b/drivers/video/mcde/mcde_display.c @@ -92,6 +92,8 @@ static int mcde_display_set_power_mode_default(struct mcde_display_device *ddev, ddev->power_mode = MCDE_DISPLAY_PM_OFF; } + mcde_chnl_set_power_mode(ddev->chnl_state, ddev->power_mode); + return ret; } @@ -205,11 +207,12 @@ static int mcde_display_set_synchronized_update_default( int ret = 0; if (ddev->port->type == MCDE_PORTTYPE_DSI) { if (ddev->port->sync_src == MCDE_SYNCSRC_TE0 || - ddev->port->sync_src == MCDE_SYNCSRC_TE1) { + ddev->port->sync_src == MCDE_SYNCSRC_TE1 || + ddev->port->sync_src == MCDE_SYNCSRC_BTA) { u8 m = 0; ret = mcde_display_dsi_dcs_write(ddev, DCS_CMD_SET_TEAR_ON, &m, 1); - } else if (ddev->port->sync_src != MCDE_SYNCSRC_BTA) { + } else { ret = -EINVAL; } } else { diff --git a/drivers/video/mcde/mcde_dss.c b/drivers/video/mcde/mcde_dss.c index d6930a6ad70..846d7c33e33 100644 --- a/drivers/video/mcde/mcde_dss.c +++ b/drivers/video/mcde/mcde_dss.c @@ -67,8 +67,7 @@ static int apply_overlay(struct mcde_overlay *ovly, /* MCDE DSS operations */ -int mcde_dss_enable_display(struct mcde_display_device *ddev, - bool display_initialized) +int mcde_dss_enable_display(struct mcde_display_device *ddev) { int ret; struct mcde_chnl_state *chnl; @@ -84,22 +83,20 @@ int mcde_dss_enable_display(struct mcde_display_device *ddev, goto get_chnl_failed; } ddev->chnl_state = chnl; - if (!display_initialized) { - /* Initiate display communication */ - ret = ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_STANDBY); - if (ret < 0) { - dev_warn(&ddev->dev, "Failed to initialize display\n"); - goto display_failed; - } - - dev_dbg(&ddev->dev, "Display enabled, chnl=%d\n", - ddev->chnl_id); - } else { - dev_dbg(&ddev->dev, "Display already enabled, chnl=%d\n", - ddev->chnl_id); - ddev->power_mode = MCDE_DISPLAY_PM_ON; - ret = 0; + /* Initiate display communication */ + ret = ddev->set_power_mode(ddev, MCDE_DISPLAY_PM_STANDBY); + if (ret < 0) { + dev_warn(&ddev->dev, "Failed to initialize display\n"); + goto display_failed; } + + ret = ddev->set_synchronized_update(ddev, ddev->synchronized_update); + if (ret < 0) + dev_warn(&ddev->dev, "Failed to set sync\n"); + /* TODO: call driver for all defaults like sync_update above */ + + dev_dbg(&ddev->dev, "Display enabled, chnl=%d\n", + ddev->chnl_id); ddev->enabled = true; out: return ret; diff --git a/drivers/video/mcde/mcde_fb.c b/drivers/video/mcde/mcde_fb.c index fc77e5be1d8..f9697d2e9df 100644 --- a/drivers/video/mcde/mcde_fb.c +++ b/drivers/video/mcde/mcde_fb.c @@ -411,6 +411,7 @@ static int apply_var(struct fb_info *fbi, struct mcde_display_device *ddev) /* Reallocate memory */ line_len = (fbi->var.bits_per_pixel * var->xres_virtual) / 8; + line_len = ALIGN(line_len, MCDE_BUF_LINE_ALIGMENT); size = line_len * var->yres_virtual; ret = reallocate_fb_mem(fbi, size); if (ret) { @@ -432,7 +433,6 @@ static int apply_var(struct fb_info *fbi, struct mcde_display_device *ddev) memset(&vmode, 0, sizeof(struct mcde_video_mode)); var_to_vmode(var, &vmode); mcde_dss_set_video_mode(ddev, &vmode); - mcde_dss_apply_channel(ddev); } @@ -531,7 +531,7 @@ static struct fb_ops fb_ops = { struct fb_info *mcde_fb_create(struct mcde_display_device *ddev, u16 w, u16 h, u16 vw, u16 vh, enum mcde_ovly_pix_fmt pix_fmt, - u32 rotate, bool display_initialized) + u32 rotate) { int ret = 0; struct fb_info *fbi; @@ -554,7 +554,7 @@ struct fb_info *mcde_fb_create(struct mcde_display_device *ddev, init_fb(fbi); mfb = to_mcde_fb(fbi); - ret = mcde_dss_enable_display(ddev, display_initialized); + ret = mcde_dss_enable_display(ddev); if (ret) goto display_enable_failed; @@ -584,15 +584,7 @@ struct fb_info *mcde_fb_create(struct mcde_display_device *ddev, if (ret) goto fb_register_failed; - if (!display_initialized) { - ret = mcde_dss_update_overlay(ovly); - if (ret) - goto ovly_update_failed; - } - goto out; -ovly_update_failed: - unregister_framebuffer(fbi); fb_register_failed: mcde_dss_disable_overlay(ovly); ovly_enable_failed: diff --git a/drivers/video/mcde/mcde_hw.c b/drivers/video/mcde/mcde_hw.c index c04f06717a2..0ec39e572c8 100644 --- a/drivers/video/mcde/mcde_hw.c +++ b/drivers/video/mcde/mcde_hw.c @@ -181,7 +181,7 @@ struct tv_regs { /* field 1 */ u16 bel1; /* field total vertical blanking lines */ u16 fsl1; /* field vbp */ - /* field 1 *//* REVIEW: Field 2? */ + /* field 2 */ u16 bel2; u16 fsl2; bool interlaced_en; @@ -201,6 +201,8 @@ struct mcde_chnl_state { u32 transactionid_hw; wait_queue_head_t waitq_hw; /* Waitq for transactionid_hw */ + enum mcde_display_power_mode power_mode; + /* Staged settings */ bool synchronized_update; enum mcde_port_pix_fmt pix_fmt; @@ -217,117 +219,6 @@ struct mcde_chnl_state { bool continous_running; }; -/* TODO: give these a place? *//* REVIEW: Remove, move to top move to use? */ -#define MCDE_CONFIG_TVOUT_HBORDER 2 -#define MCDE_CONFIG_TVOUT_VBORDER 2 - -int mcde_chnl_set_video_mode(struct mcde_chnl_state *chnl, - struct mcde_video_mode *vmode) -{ - if (chnl == NULL || vmode == NULL) - return -EINVAL; - - disable_channel(chnl); - chnl->vmode = *vmode; - - return 0; -} - -static void tv_video_mode_apply(struct mcde_chnl_state *chnl) -{ - /* assume xres == 720 */ - dev_vdbg(&mcde_dev->dev, "%s\n", __func__); - /* -4 since MCDE doesn't include SAV/EAV, 2 bytes each, to blanking */ - chnl->tv_regs.hbw = chnl->vmode.hbp + chnl->vmode.hfp - 4; - chnl->tv_regs.bel1 = chnl->vmode.vbp1 + chnl->vmode.vfp1; - chnl->tv_regs.fsl1 = chnl->vmode.vbp1; - chnl->tv_regs.bel2 = chnl->vmode.vbp2 + chnl->vmode.vfp2; - chnl->tv_regs.fsl2 = chnl->vmode.vbp2; - chnl->tv_regs.interlaced_en = chnl->vmode.interlaced; - - if (chnl->port.phy.dpi.num_data_lanes == 4) - chnl->tv_regs.tv_mode = MCDE_TVCRA_TVMODE_SDTV_656P_BE; - else - chnl->tv_regs.tv_mode = MCDE_TVCRA_TVMODE_SDTV_656P; -} - -static void update_tv_registers(enum mcde_chnl chnl_id, struct tv_regs *regs) -{ - u8 idx = chnl_id; - u8 maj_version; - - dev_dbg(&mcde_dev->dev, "%s\n", __func__); - mcde_wreg(MCDE_TVCRA + idx * MCDE_TVCRA_GROUPOFFSET, - MCDE_TVCRA_SEL_MOD(MCDE_TVCRA_SEL_MOD_TV) | - MCDE_TVCRA_INTEREN(regs->interlaced_en) | - MCDE_TVCRA_IFIELD(1) | - MCDE_TVCRA_TVMODE(regs->tv_mode) | - MCDE_TVCRA_SDTVMODE(MCDE_TVCRA_SDTVMODE_Y0CBY1CR) | - MCDE_TVCRA_AVRGEN(0)); - /* REVIEW: Magic values */ - mcde_wreg(MCDE_TVBLUA + idx * MCDE_TVBLUA_GROUPOFFSET, - MCDE_TVBLUA_TVBLU(0x83) | - MCDE_TVBLUA_TVBCB(0x9c) | - MCDE_TVBLUA_TVBCR(0x2c)); - - /* Vertical timing registers */ - mcde_wreg(MCDE_TVDVOA + idx * MCDE_TVDVOA_GROUPOFFSET, - MCDE_TVDVOA_DVO1(MCDE_CONFIG_TVOUT_VBORDER) | - MCDE_TVDVOA_DVO2(MCDE_CONFIG_TVOUT_VBORDER)); - mcde_wreg(MCDE_TVBL1A + idx * MCDE_TVBL1A_GROUPOFFSET, - MCDE_TVBL1A_BEL1(regs->bel1) | - MCDE_TVBL1A_BSL1(MCDE_CONFIG_TVOUT_VBORDER)); - mcde_wreg(MCDE_TVBL2A + idx * MCDE_TVBL1A_GROUPOFFSET, - MCDE_TVBL2A_BEL2(regs->bel2) | - MCDE_TVBL2A_BSL2(MCDE_CONFIG_TVOUT_VBORDER)); - mcde_wreg(MCDE_TVISLA + idx * MCDE_TVISLA_GROUPOFFSET, - MCDE_TVISLA_FSL1(regs->fsl1) | - MCDE_TVISLA_FSL2(regs->fsl2)); - /* Horizontal timing registers */ - maj_version = MCDE_REG2VAL(/* REVIEW: Make global and do on init? */ - MCDE_PID, MAJOR_VERSION, mcde_rreg(MCDE_PID)); - - if (maj_version > 3) { - mcde_wreg(MCDE_TVLBALWA + idx * MCDE_TVLBALWA_GROUPOFFSET, - MCDE_TVLBALWA_LBW(regs->hbw) | - MCDE_TVLBALWA_ALW(MCDE_CONFIG_TVOUT_HBORDER)); - mcde_wreg(MCDE_TVTIM1A + idx * MCDE_TVTIM1A_GROUPOFFSET, - MCDE_TVTIM1A_DHO(MCDE_CONFIG_TVOUT_HBORDER)); - } else { - /* in earlier versions the LBW and DHO fields are swapped */ - mcde_wreg(MCDE_TVLBALWA + idx * MCDE_TVLBALWA_GROUPOFFSET, - MCDE_TVLBALWA_LBW(MCDE_CONFIG_TVOUT_HBORDER) | - MCDE_TVLBALWA_ALW(MCDE_CONFIG_TVOUT_HBORDER)); - mcde_wreg(MCDE_TVTIM1A + idx * MCDE_TVTIM1A_GROUPOFFSET, - MCDE_TVTIM1A_DHO(regs->hbw)); - } -} - -static void update_col_registers(enum mcde_chnl chnl_id, struct col_regs *regs) -{ - u8 idx = chnl_id; - - dev_vdbg(&mcde_dev->dev, "%s\n", __func__); - mcde_wreg(MCDE_RGBCONV1A + idx * MCDE_RGBCONV1A_GROUPOFFSET, - MCDE_RGBCONV1A_YR_RED(regs->y_red) | - MCDE_RGBCONV1A_YR_GREEN(regs->y_green)); - mcde_wreg(MCDE_RGBCONV2A + idx * MCDE_RGBCONV2A_GROUPOFFSET, - MCDE_RGBCONV2A_YR_BLUE(regs->y_blue) | - MCDE_RGBCONV2A_CR_RED(regs->cr_red)); - mcde_wreg(MCDE_RGBCONV3A + idx * MCDE_RGBCONV3A_GROUPOFFSET, - MCDE_RGBCONV3A_CR_GREEN(regs->cr_green) | - MCDE_RGBCONV3A_CR_BLUE(regs->cr_blue)); - mcde_wreg(MCDE_RGBCONV4A + idx * MCDE_RGBCONV4A_GROUPOFFSET, - MCDE_RGBCONV4A_CB_RED(regs->cb_red) | - MCDE_RGBCONV4A_CB_GREEN(regs->cb_green)); - mcde_wreg(MCDE_RGBCONV5A + idx * MCDE_RGBCONV5A_GROUPOFFSET, - MCDE_RGBCONV5A_CB_BLUE(regs->cb_blue) | - MCDE_RGBCONV5A_OFF_RED(regs->off_red)); - mcde_wreg(MCDE_RGBCONV6A + idx * MCDE_RGBCONV6A_GROUPOFFSET, - MCDE_RGBCONV6A_OFF_GREEN(regs->off_green) | - MCDE_RGBCONV6A_OFF_BLUE(regs->off_blue)); -} -/* REVIEW: Move all structs etc to top, don't mix code and declarations */ static struct mcde_chnl_state channels[] = { { .id = MCDE_CHNL_A, @@ -365,6 +256,7 @@ struct chnl_config { bool f01mux; bool f01mux_set; }; + static /* TODO: const, compiler bug? */ struct chnl_config chnl_configs[] = { /* Channel A */ { .path = MCDE_CHNLPATH_CHNLA_FIFOA_DPI_0, @@ -448,8 +340,117 @@ static /* TODO: const, compiler bug? */ struct chnl_config chnl_configs[] = { .fabmux = true, .fabmux_set = true }, }; -/* MCDE internal helpers */ +/* TODO: give these a place? *//* REVIEW: Remove, move to top move to use? */ +#define MCDE_CONFIG_TVOUT_HBORDER 2 +#define MCDE_CONFIG_TVOUT_VBORDER 2 +int mcde_chnl_set_video_mode(struct mcde_chnl_state *chnl, + struct mcde_video_mode *vmode) +{ + if (chnl == NULL || vmode == NULL) + return -EINVAL; + + disable_channel(chnl); + chnl->vmode = *vmode; + + return 0; +} + +static void tv_video_mode_apply(struct mcde_chnl_state *chnl) +{ + dev_vdbg(&mcde_dev->dev, "%s\n", __func__); + /* -4 since MCDE doesn't include SAV/EAV, 2 bytes each, to blanking */ + chnl->tv_regs.hbw = chnl->vmode.hbp + chnl->vmode.hfp - 4; + chnl->tv_regs.bel1 = chnl->vmode.vbp1 + chnl->vmode.vfp1; + chnl->tv_regs.fsl1 = chnl->vmode.vbp1; + chnl->tv_regs.bel2 = chnl->vmode.vbp2 + chnl->vmode.vfp2; + chnl->tv_regs.fsl2 = chnl->vmode.vbp2; + chnl->tv_regs.interlaced_en = chnl->vmode.interlaced; + + if (chnl->port.phy.dpi.num_data_lanes == 4) + chnl->tv_regs.tv_mode = MCDE_TVCRA_TVMODE_SDTV_656P_BE; + else + chnl->tv_regs.tv_mode = MCDE_TVCRA_TVMODE_SDTV_656P; +} + +static void update_tv_registers(enum mcde_chnl chnl_id, struct tv_regs *regs) +{ + u8 idx = chnl_id; + u8 maj_version; + + dev_dbg(&mcde_dev->dev, "%s\n", __func__); + mcde_wreg(MCDE_TVCRA + idx * MCDE_TVCRA_GROUPOFFSET, + MCDE_TVCRA_SEL_MOD(MCDE_TVCRA_SEL_MOD_TV) | + MCDE_TVCRA_INTEREN(regs->interlaced_en) | + MCDE_TVCRA_IFIELD(1) | + MCDE_TVCRA_TVMODE(regs->tv_mode) | + MCDE_TVCRA_SDTVMODE(MCDE_TVCRA_SDTVMODE_Y0CBY1CR) | + MCDE_TVCRA_AVRGEN(0)); + /* REVIEW: Magic values */ + mcde_wreg(MCDE_TVBLUA + idx * MCDE_TVBLUA_GROUPOFFSET, + MCDE_TVBLUA_TVBLU(0x83) | + MCDE_TVBLUA_TVBCB(0x9c) | + MCDE_TVBLUA_TVBCR(0x2c)); + + /* Vertical timing registers */ + mcde_wreg(MCDE_TVDVOA + idx * MCDE_TVDVOA_GROUPOFFSET, + MCDE_TVDVOA_DVO1(MCDE_CONFIG_TVOUT_VBORDER) | + MCDE_TVDVOA_DVO2(MCDE_CONFIG_TVOUT_VBORDER)); + mcde_wreg(MCDE_TVBL1A + idx * MCDE_TVBL1A_GROUPOFFSET, + MCDE_TVBL1A_BEL1(regs->bel1) | + MCDE_TVBL1A_BSL1(MCDE_CONFIG_TVOUT_VBORDER)); + mcde_wreg(MCDE_TVBL2A + idx * MCDE_TVBL1A_GROUPOFFSET, + MCDE_TVBL2A_BEL2(regs->bel2) | + MCDE_TVBL2A_BSL2(MCDE_CONFIG_TVOUT_VBORDER)); + mcde_wreg(MCDE_TVISLA + idx * MCDE_TVISLA_GROUPOFFSET, + MCDE_TVISLA_FSL1(regs->fsl1) | + MCDE_TVISLA_FSL2(regs->fsl2)); + /* Horizontal timing registers */ + maj_version = MCDE_REG2VAL(/* REVIEW: Make global and do on init? */ + MCDE_PID, MAJOR_VERSION, mcde_rreg(MCDE_PID)); + + if (maj_version > 3) { + mcde_wreg(MCDE_TVLBALWA + idx * MCDE_TVLBALWA_GROUPOFFSET, + MCDE_TVLBALWA_LBW(regs->hbw) | + MCDE_TVLBALWA_ALW(MCDE_CONFIG_TVOUT_HBORDER)); + mcde_wreg(MCDE_TVTIM1A + idx * MCDE_TVTIM1A_GROUPOFFSET, + MCDE_TVTIM1A_DHO(MCDE_CONFIG_TVOUT_HBORDER)); + } else { + /* in earlier versions the LBW and DHO fields are swapped */ + mcde_wreg(MCDE_TVLBALWA + idx * MCDE_TVLBALWA_GROUPOFFSET, + MCDE_TVLBALWA_LBW(MCDE_CONFIG_TVOUT_HBORDER) | + MCDE_TVLBALWA_ALW(MCDE_CONFIG_TVOUT_HBORDER)); + mcde_wreg(MCDE_TVTIM1A + idx * MCDE_TVTIM1A_GROUPOFFSET, + MCDE_TVTIM1A_DHO(regs->hbw)); + } +} + +static void update_col_registers(enum mcde_chnl chnl_id, struct col_regs *regs) +{ + u8 idx = chnl_id; + + dev_vdbg(&mcde_dev->dev, "%s\n", __func__); + mcde_wreg(MCDE_RGBCONV1A + idx * MCDE_RGBCONV1A_GROUPOFFSET, + MCDE_RGBCONV1A_YR_RED(regs->y_red) | + MCDE_RGBCONV1A_YR_GREEN(regs->y_green)); + mcde_wreg(MCDE_RGBCONV2A + idx * MCDE_RGBCONV2A_GROUPOFFSET, + MCDE_RGBCONV2A_YR_BLUE(regs->y_blue) | + MCDE_RGBCONV2A_CR_RED(regs->cr_red)); + mcde_wreg(MCDE_RGBCONV3A + idx * MCDE_RGBCONV3A_GROUPOFFSET, + MCDE_RGBCONV3A_CR_GREEN(regs->cr_green) | + MCDE_RGBCONV3A_CR_BLUE(regs->cr_blue)); + mcde_wreg(MCDE_RGBCONV4A + idx * MCDE_RGBCONV4A_GROUPOFFSET, + MCDE_RGBCONV4A_CB_RED(regs->cb_red) | + MCDE_RGBCONV4A_CB_GREEN(regs->cb_green)); + mcde_wreg(MCDE_RGBCONV5A + idx * MCDE_RGBCONV5A_GROUPOFFSET, + MCDE_RGBCONV5A_CB_BLUE(regs->cb_blue) | + MCDE_RGBCONV5A_OFF_RED(regs->off_red)); + mcde_wreg(MCDE_RGBCONV6A + idx * MCDE_RGBCONV6A_GROUPOFFSET, + MCDE_RGBCONV6A_OFF_GREEN(regs->off_green) | + MCDE_RGBCONV6A_OFF_BLUE(regs->off_blue)); +} + +/* MCDE internal helpers */ static u8 portfmt2dsipacking(enum mcde_port_pix_fmt pix_fmt) { switch (pix_fmt) { @@ -575,10 +576,9 @@ static irqreturn_t mcde_irq_handler(int irq, void *dev) } irq_status = dsi_rfld(i, DSI_CMD_MODE_STS_FLAG, ERR_NO_TE_FLAG); if (irq_status) { - trig = true; dsi_wreg(i, DSI_CMD_MODE_STS_CLR, DSI_CMD_MODE_STS_CLR_ERR_NO_TE_CLR(true)); - dev_vdbg(&mcde_dev->dev, "NO_TE DSI%d\n", i); + dev_info(&mcde_dev->dev, "NO_TE DSI%d\n", i); } if (!trig) continue; @@ -1351,6 +1351,16 @@ int mcde_chnl_enable_synchronized_update(struct mcde_chnl_state *chnl, return 0; } +int mcde_chnl_set_power_mode(struct mcde_chnl_state *chnl, + enum mcde_display_power_mode power_mode) +{ + if (!chnl->inuse) + return -EINVAL; + + chnl->power_mode = power_mode; + return 0; +} + int mcde_chnl_apply(struct mcde_chnl_state *chnl) { /* TODO: lock *//* REVIEW: MCDE locking! */ @@ -1422,7 +1432,8 @@ static void chnl_update_non_continous(struct mcde_chnl_state *chnl) chnl_update_registers(chnl); /* TODO: look at port sync source and synched_update */ - if (chnl->regs.synchronized_update) { + if (chnl->regs.synchronized_update && + chnl->power_mode == MCDE_DISPLAY_PM_ON) { if (chnl->port.type == MCDE_PORTTYPE_DSI && chnl->port.sync_src == MCDE_SYNCSRC_BTA) { while (dsi_rfld(chnl->port.link, DSI_CMD_MODE_STS, @@ -1430,7 +1441,6 @@ static void chnl_update_non_continous(struct mcde_chnl_state *chnl) udelay(100); dsi_te_request(chnl); } - /* TODO: TE sync */ } else { mcde_wreg(MCDE_CHNL0SYNCHSW + chnl->id * MCDE_CHNL0SYNCHSW_GROUPOFFSET, |