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-rw-r--r--arch/arm/mach-mx5/Makefile3
-rw-r--r--arch/arm/mach-mx5/cpuidle.c82
-rw-r--r--arch/arm/mach-mx5/cpuidle.h13
-rw-r--r--arch/arm/mach-mx5/mm.c4
4 files changed, 100 insertions, 2 deletions
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
index 383e7cd3fbc..4471ce76e39 100644
--- a/arch/arm/mach-mx5/Makefile
+++ b/arch/arm/mach-mx5/Makefile
@@ -3,9 +3,8 @@
#
# Object file lists.
-obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o ehci.o system.o
+obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o ehci.o system.o cpuidle.o
obj-$(CONFIG_SOC_IMX50) += mm-mx50.o
-
obj-$(CONFIG_PM) += pm-imx5.o
obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o
obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o
diff --git a/arch/arm/mach-mx5/cpuidle.c b/arch/arm/mach-mx5/cpuidle.c
new file mode 100644
index 00000000000..fa3ea6a66f8
--- /dev/null
+++ b/arch/arm/mach-mx5/cpuidle.c
@@ -0,0 +1,82 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <asm/proc-fns.h>
+#include <mach/cpuidle.h>
+#include <mach/system.h>
+
+static int mx5_cpuidle_init(void *init_data);
+static int mx5_cpuidle(struct cpuidle_device *dev, struct cpuidle_state *state);
+
+static struct imx_cpuidle_state_data mx5_cpuidle_state_data[] __initdata = {
+ {
+ .name = "powered_noclock",
+ .desc = "idle cpu powered, unclocked.",
+ .exit_latency = 12,
+ .mach_cpu_pwr_state = WAIT_UNCLOCKED,
+ }, {
+ .name = "nopower_noclock",
+ .desc = "idle cpu unpowered, unclocked.",
+ .exit_latency = 20,
+ .mach_cpu_pwr_state = WAIT_UNCLOCKED_POWER_OFF,
+ }
+};
+
+static struct cpuidle_driver mx5_cpuidle_driver = {
+ .name = "imx5_cpuidle",
+ .owner = THIS_MODULE,
+};
+
+struct imx_cpuidle_data mx5_cpuidle_data __initdata = {
+ .imx_cpuidle_driver = &mx5_cpuidle_driver,
+ .state_data = mx5_cpuidle_state_data,
+ .mach_cpuidle = mx5_cpuidle,
+ .mach_cpuidle_init = mx5_cpuidle_init,
+ .num_states = ARRAY_SIZE(mx5_cpuidle_state_data),
+};
+
+int mx5_cpuidle(struct cpuidle_device *dev, struct cpuidle_state *state)
+{
+ mx5_cpu_lp_set((enum mxc_cpu_pwr_mode)state->driver_data);
+
+ cpu_do_idle();
+
+ return 0;
+}
+
+int __init mx5_cpuidle_init(void * init_data)
+{
+ int ret;
+ struct clk *gpc_dvfs_clk;
+
+ gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs");
+
+ if (IS_ERR(gpc_dvfs_clk)) {
+ pr_err("%s: Failed to get gpc_dvfs clock\n", __func__);
+ return (int)gpc_dvfs_clk;
+ }
+
+ ret = clk_enable(gpc_dvfs_clk);
+
+ if (IS_ERR(&ret)) {
+ pr_err("%s: Failed to enable gpc_dvfs clock\n", __func__);
+ return ret;
+ }
+
+ return 0;
+}
diff --git a/arch/arm/mach-mx5/cpuidle.h b/arch/arm/mach-mx5/cpuidle.h
new file mode 100644
index 00000000000..270ffa651d6
--- /dev/null
+++ b/arch/arm/mach-mx5/cpuidle.h
@@ -0,0 +1,13 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+extern struct imx_cpuidle_data mx5_cpuidle_data;
diff --git a/arch/arm/mach-mx5/mm.c b/arch/arm/mach-mx5/mm.c
index baea6e5cddd..29bb785a398 100644
--- a/arch/arm/mach-mx5/mm.c
+++ b/arch/arm/mach-mx5/mm.c
@@ -20,6 +20,8 @@
#include <mach/common.h>
#include <mach/devices-common.h>
#include <mach/iomux-v3.h>
+#include <mach/cpuidle.h>
+#include "cpuidle.h"
/*
* Define the MX51 memory map.
@@ -148,6 +150,8 @@ void __init imx51_soc_init(void)
/* i.mx51 has the i.mx35 type sdma */
imx_add_imx_sdma("imx35-sdma", MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata);
+
+ imx_cpuidle_init(&mx5_cpuidle_data);
}
void __init imx53_soc_init(void)