diff options
| author | Ranjani Vaidyanathan <ra5478@freescale.com> | 2011-10-19 14:38:19 -0500 |
|---|---|---|
| committer | Eric Miao <eric.miao@canonical.com> | 2011-11-10 07:38:54 +0800 |
| commit | 2f18a84207bd26d13820f2bb58b42ba7e8d15916 (patch) | |
| tree | 14bd1af426736d4a85a8e3a24c6981d5739f2538 /arch/arm/mach-mx6/cpu.c | |
| parent | 638b42a34c4cbb4932613b42a8d4c4c9b8f6e6c5 (diff) | |
ENGR00160492: MX6-Disable PLL1 when CPU clk is below 400MHz.
When CPU frequency is below 400MHz (due to CPUFREQ or dvfs-core), we can source
pll1_sw_clk from PLL2_PFD_400M and disable PLL1. This can save some power.
Fixed warnings in dvfs_core driver.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
Diffstat (limited to 'arch/arm/mach-mx6/cpu.c')
0 files changed, 0 insertions, 0 deletions