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authorSteve Wise <swise@opengridcomputing.com>2009-05-27 14:43:39 -0700
committerRoland Dreier <rolandd@cisco.com>2009-05-27 14:43:39 -0700
commit3026c19a14ba71ccd4dc4925abab9395ea12839c (patch)
tree9264da66d2ab516b7ffdf310d2cf5ac078cc4415 /drivers/infiniband
parent7ab1a2b31d4a8b4f519ccff5a84c53a5b87fd1be (diff)
RDMA/cxgb3: Limit fast register size based on T3 limitations
T3 firmware only supports one WRs worth of page list for fast register work requests. The driver currently allows 2 WRs worth, which doesn't work for T3, so reduce the limit in the driver. Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/infiniband')
-rw-r--r--drivers/infiniband/hw/cxgb3/cxio_wr.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/infiniband/hw/cxgb3/cxio_wr.h b/drivers/infiniband/hw/cxgb3/cxio_wr.h
index ff9be1a1310..32e3b1461d8 100644
--- a/drivers/infiniband/hw/cxgb3/cxio_wr.h
+++ b/drivers/infiniband/hw/cxgb3/cxio_wr.h
@@ -176,7 +176,7 @@ struct t3_send_wr {
struct t3_sge sgl[T3_MAX_SGE]; /* 4+ */
};
-#define T3_MAX_FASTREG_DEPTH 24
+#define T3_MAX_FASTREG_DEPTH 10
#define T3_MAX_FASTREG_FRAG 10
struct t3_fastreg_wr {