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| author | Mathieu Desnoyers <mathieu.desnoyers@efficios.com> | 2011-03-16 19:05:07 -0400 |
|---|---|---|
| committer | Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> | 2011-03-16 19:05:07 -0400 |
| commit | a00d9cb6fbd139cbf0f047b2e32dcdfd9872e72b (patch) | |
| tree | 75e00c5a6a88f0107c87be006440c3c93e45efa0 | |
| parent | 2539206c0614972496b98c572653a42dd002eb98 (diff) | |
omap-lttng-use-iter_div
omap lttng use iter div
ARM does no seem to like u64 div in math64.h. Use the "iter" version.
Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
| -rw-r--r-- | kernel/trace/trace-clock-32-to-64.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/kernel/trace/trace-clock-32-to-64.c b/kernel/trace/trace-clock-32-to-64.c index 3134e47de78..11d961d8acf 100644 --- a/kernel/trace/trace-clock-32-to-64.c +++ b/kernel/trace/trace-clock-32-to-64.c @@ -153,13 +153,15 @@ static void tsc_timer_fct(unsigned long data) */ static int __init precalc_stsc_interval(void) { + u64 rem_freq, rem_interval; + precalc_expire = - div_u64(HW_BITMASK, - ((div_u64(trace_clock_frequency(), HZ) + __iter_div_u64_rem(HW_BITMASK, + ((__iter_div_u64_rem(trace_clock_frequency(), HZ, &rem_freq) * trace_clock_freq_scale()) << 1) - 1 - - (EXPECTED_INTERRUPT_LATENCY * HZ / 1000)) + - (EXPECTED_INTERRUPT_LATENCY * HZ / 1000), &rem_interval) >> 1; WARN_ON(precalc_expire == 0); printk(KERN_DEBUG "Synthetic TSC timer will fire each %u jiffies.\n", |